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74LVX373MTC PDF даташит

Спецификация 74LVX373MTC изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «Low Voltage Octal Transparent Latch with 3-STATE Outputs».

Детали детали

Номер произв 74LVX373MTC
Описание Low Voltage Octal Transparent Latch with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74LVX373MTC Даташит, Описание, Даташиты
June 1993
Revised March 1999
74LVX373
Low Voltage Octal Transparent Latch with
3-STATE Outputs
General Description
The LVX373 consists of eight latches with 3-STATE outputs
for bus organized system applications. The latches appear
transparent to the data when Latch Enable (LE) is HIGH.
When LE is LOW, the data satisfying the input timing
requirements is latched. Data appears on the bus when the
Output Enable (OE) is LOW. When OE is HIGH, the bus
output is in the high impedance state. The inputs tolerate
up to 7V allowing interface of 5V systems to 3V systems.
Features
s Input voltage translation from 5V to 3V
s Ideal for low power/low noise 3.3V applications
Ordering Code:
Order Number Package Number
Package Description
74LVX373M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
74LVX373SJ
74LVX373MTC
M20D
MTC20
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
D0–D7
LE
OE
O0–O7
Description
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
© 1999 Fairchild Semiconductor Corporation DS011613.prf
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74LVX373MTC Даташит, Описание, Даташиты
Functional Description
The LVX373 contains eight D-type latches with 3-STATE
standard outputs. When the Latch Enable (LE) input is
HIGH, data on the Dn inputs enters the latches. In this con-
dition the latches are transparent, i.e., a latch output will
change state each time its D input changes. When LE is
LOW, the latches store the information that was present on
the D inputs a setup time preceding the HIGH-to-LOW tran-
sition of LE. The 3-STATE standard outputs are controlled
by the Output Enable (OE) input. When OE is LOW, the
standard outputs are in the 2-state mode. When OE is
HIGH, the standard outputs are in the high impedance
mode but this does not interfere with entering new data into
the latches.
Truth Table
Inputs
Outputs
LE OE Dn
XHX
On
Z
HL L
L
HLH
H
LLX
O0
H = HIGH Voltage Level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
O0 = Previous O0 before HIGH-to-LOW transition of Latch Enable
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74LVX373MTC Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC +0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
(ICC or IGND)
Storage Temperature (TSTG)
Power Dissipation
0.5V to +7.0V
20 mA
0.5V to 7V
20 mA
+20 mA
0.5V to VCC + 0.5V
±25 mA
±75 mA
65°C to +150°C
180 mW
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC)
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Input Rise and Fall Time (t/V)
2.0V to 3.6V
0V to 5.5V
0V to VCC
40°C to +85°C
0 ns/V to 100 ns/V
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
VIH HIGH Level
Input Voltage
VIL LOW Level
Input Voltage
VOH HIGH Level
Output Voltage
VOL LOW Level
Output Voltage
IOZ 3-STATE Output
Off-State Current
IIN Input Leakage Current
ICC Quiescent Supply Current
VCC
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
3.6
3.6
3.6
Min
1.5
2.0
2.4
1.9
2.9
2.58
TA = +25°C
Typ Max
0.5
0.8
0.8
2.0
3.0
0.0 0.1
0.0 0.1
0.36
±0.25
±0.1
4.0
TA = −40°C to +85°C
Min Max
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.48
0.1
0.1
0.44
±2.5
±1.0
40.0
Units
V
V
V
V
µA
µA
µA
Conditions
VIN = VIH or VIL IOH = −50 µA
IOH = −50 µA
IOH = −4 mA
VIN = VIH or VIL IOL = 50 µA
IOL = 50 µA
IOL = 4 mA
VIN = VIH or VIL
VOUT = VCC or GND
VIN = 5.5V or GND
VIN = VCC or GND
Noise Characteristics (Note 3)
Symbol
Parameter
VOLP
Quiet Output Maximum Dynamic VOL
VOLV
Quiet Output Minimum Dynamic VOL
VIHD
Minimum HIGH Level Dynamic Input Voltage
VILD Maximum LOW Level Dynamic Input Voltage
Note 3: Input tr = tf = 3 ns.
VCC
TA = 25°C
Units
(V) Typ Limit
3.3 0.5 0.8
V
3.3 0.5 0.8
V
3.3 2.0 V
3.3 0.8 V
CL (pF)
50
50
50
50
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74LVX373MTCLow Voltage Octal Transparent Latch with 3-STATE OutputsFairchild Semiconductor
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