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74VHC02MTC PDF даташит

Спецификация 74VHC02MTC изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «Quad 2-Input NOR Gate».

Детали детали

Номер произв 74VHC02MTC
Описание Quad 2-Input NOR Gate
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74VHC02MTC Даташит, Описание, Даташиты
December 2007
74VHC02
Quad 2-Input NOR Gate
Features
High Speed: tPD = 3.6ns (Typ.) at VCC = 5V
Low power dissipation: ICC = 2µA (Max.) at TA = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (Min.)
Power down protection is provided on all inputs
Low noise: VOLP = 0.8V (Max.)
Pin and function compatible with 74HC02
General Description
The VHC02 is an advanced high-speed CMOS 2-Input
NOR Gate fabricated with silicon gate CMOS technol-
ogy. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation. The internal circuit is
composed of 3 stages, including buffer output, which
provide high noise immunity and stable output. An input
protection circuit insures that 0V to 7V can be applied to
the input pins without regard to the supply voltage. This
device can be used to interface 5V to 3V systems and
two supply systems such as battery backup. This circuit
prevents device destruction due to mismatched supply
and input voltages.
Ordering Information
Order Number
Package
Number
Package Description
74VHC02M
74VHC02SJ
74VHC02MTC
M14A
M14D
MTC14
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
©1992 Fairchild Semiconductor Corporation
74VHC02 Rev. 1.4.0
www.fairchildsemi.com









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74VHC02MTC Даташит, Описание, Даташиты
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Description
Pin Names
An, Bn
On
Description
Inputs
Outputs
Truth Table
A
L
L
H
H
B
L
H
L
H
O
H
L
L
L
©1992 Fairchild Semiconductor Corporation
74VHC02 Rev. 1.4.0
2
www.fairchildsemi.com









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74VHC02MTC Даташит, Описание, Даташиты
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCC
VIN
VOUT
IIK
IOK
IOUT
ICC
TSTG
TL
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
Input Diode Current
Output Diode Current
DC Output Current
DC VCC / GND Current
Storage Temperature
Lead Temperature (Soldering, 10 seconds)
Rating
–0.5V to +7.0V
–0.5V to +7.0V
–0.5V to VCC + 0.5V
–20mA
±20mA
±25mA
±50mA
–65°C to +150°C
260°C
Recommended Operating Conditions(1)
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol
Parameter
VCC
VIN
VOUT
TOPR
tr, tf
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time,
VCC = 3.3V ± 0.3V
VCC = 5.0V ± 0.5V
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
Rating
2.0V to +5.5V
0V to +5.5V
0V to VCC
–40°C to +85°C
0ns/V 100ns/V
0ns/V 20ns/V
©1992 Fairchild Semiconductor Corporation
74VHC02 Rev. 1.4.0
3
www.fairchildsemi.com










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Номер в каталогеОписаниеПроизводители
74VHC02MTCQuad 2-Input NOR GateFairchild Semiconductor
Fairchild Semiconductor

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