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74VHC541MTC PDF даташит

Спецификация 74VHC541MTC изготовлена ​​​​«Fairchild Semiconductor» и имеет функцию, называемую «Octal Buffer/Line Driver with 3-STATE Outputs».

Детали детали

Номер произв 74VHC541MTC
Описание Octal Buffer/Line Driver with 3-STATE Outputs
Производители Fairchild Semiconductor
логотип Fairchild Semiconductor логотип 

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74VHC541MTC Даташит, Описание, Даташиты
August 1993
Revised April 1999
74VHC541
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The VHC541 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It achieves
the high-speed operation similar to equivalent Bipolar
Schottky TTL while maintaining the CMOS low power dissi-
pation.
The VHC541 is an octal buffer/line driver designed to be
employed as memory and address drivers, clock drivers
and bus oriented transmitter/receivers.
This device is similar in function to the VHC244 while pro-
viding flow-through architecture (inputs on opposite side
from outputs). This pinout arrangement makes this device
especially useful as an output port for microprocessors,
allowing ease of layout and greater PC board density.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply volt-
age. This device can be used to interface 5V to 3V systems
and two supply systems such as battery backup. This cir-
cuit prevents device destruction due to mismatched supply
and input voltages.
Features
s High Speed: tPD = 3.5 ns (typ) at VCC = 5V
s Low power dissipation: ICC = 4 µA (max) at TA = 25°C
s High noise immunity: VNIH = VNIL = 28% VCC (min)
s Power down protection is provided on all inputs
s Low noise: VOLP = 0.9V (typ)
s Pin and function compatible with 74HC541
Ordering Code:
Order Number Package Number
Package Description
74VHC541M
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74VHC541SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC541MTC
MTC20
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74VHC541N
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Logic Symbol
IEEE/IEC
Pin Descriptions
Pin Names
OE1, OE2
I0 - I7
O0 - O7
Descriptions
3-STATE Output Enable Inputs
Inputs
3-STATE Outputs
© 1999 Fairchild Semiconductor Corporation DS011639.prf
Truth Table
Inputs
OE1
L
H
X
L
H = HIGH Voltage Level
L = LOW Voltage Level
OE2
I
LH
XX
HX
LL
X = Immaterial
Z = High Impedance
Outputs
H
Z
Z
L
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74VHC541MTC Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
Input Diode Current (IIK)
Output Diode Current (IOK)
DC Output Current (IOUT)
DC VCC/GND Current (ICC)
Storage Temperature (TSTG)
Lead Temperature (TL)
(Soldering, 10 seconds)
0.5V to +7.0V
0.5V to +7.0V
0.5V to VCC + 0.5V
20 mA
±20 mA
±25 mA
±75 mA
65°C to +150°C
260°C
Recommended Operating
Conditions (Note 2)
Supply Voltage (VCC)
2.0V to +5.5V
Input Voltage (VIN)
0V to +5.5V
Output Voltage (VOUT)
0V to VCC
Operating Temperature (TOPR)
40°C to +85°C
Input Rise and Fall Time (tr, tf)
VCC = 3.3V ±0.3V
0 100 ns/V
VCC = 5.0V ±0.5V
0 20 ns/V
Note 1: Absolute Maximum Ratings are values beyond which the device
may be damaged or have its useful life impaired. The databook specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside databook specifica-
tions.
Note 2: Unused inputs must be held HIGH or LOW. They may not float
DC Electrical Characteristics
Symbol
VIH
VIL
VOH
VOL
IOZ
IIN
ICC
Parameter
VCC
(V)
HIGH Level Input
2.0
Voltage
3.0 5.5
LOW Level Input
2.0
Voltage
3.0 5.5
HIGH Level Output
2.0
Voltage
3.0
4.5
3.0
4.5
LOW Level Output
2.0
Voltage
3.0
4.5
3.0
4.5
3-STATE Output
5.5
Off-State Current
Input Leakage Current
0 5.5
Quiescent Supply Current 5.5
Min
1.50
0.7 VCC
1.9
2.9
4.4
2.58
3.94
TA = 25°C
Typ
2.0
3.0
4.5
0.0
0.0
0.0
Max
0.50
0.3 VCC
0.1
0.1
0.1
0.36
0.36
±0.25
±0.1
4.0
TA = −40°C to +85°C
Min Max
1.50
0.7 VCC
0.50
0.3 VCC
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
±2.5
±1.0
40.0
Units
Conditions
V
V
VIN = VIH IOH = −50 µA
V or VIL
V IOH = −4 mA
IOH = −8 mA
VIN = VIH IOL = 50 µA
V or VIL
V IOL = 4 mA
IOL = 8 mA
µA VIN = VIH or VIL
VOUT = VCC or GND
µA VIN = 5.5V or GND
µA VIN = VCC or GND
Noise Characteristics
Symbol
Parameter
VOLP
(Note 3)
VOLV
(Note 3)
VIHD
(Note 3)
Quiet Output Maximum Dynamic
VOL
Quiet Output Minimum Dynamic
VOL
Minimum HIGH Level Dynamic
Input Voltage
VILD
(Note 3)
Maximum HIGH Level Dynamic
Input Voltage
Note 3: Parameter guaranteed by design.
VCC
TA = 25°C
Units
(V) Typ Limits
Conditions
5.0 0.9 1.2
V CL = 50 pF
5.0
0.8
1.0
V CL = 50 pF
5.0 3.5 V CL = 50 pF
5.0 1.5 V CL = 50 pF
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74VHC541MTC Даташит, Описание, Даташиты
AC Electrical Characteristics
Symbol
Parameter
VCC
TA = 25°C
TA = −40°C to +85°C
Units
Conditions
(V) Min Typ Max Min Max
tPLH Propagation Delay
tPHL
Time
tPZL 3-STATE Output
tPZH
Enable Time
tPLZ 3-STATE
tPHZ
Output
Disable Time
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
5.0 7.0 1.0 8.5
ns
7.5 10.5 1.0 12.0
CL = 15 pF
CL = 50 pF
3.5 5.0 1.0 6.0
ns
5.0 7.0 1.0 8.0
CL = 15 pF
CL = 50 pF
6.8
10.5
1.0
12.5
ns RL = 1 kCL = 15 pF
9.3 14.0 1.0 16.0
CL = 50 pF
4.7 7.2 1.0 8.5
ns
6.2 9.2 1.0 10.5
CL = 15 pF
CL = 50 pF
11.2 15.4 1.0 17.5
RL = 1 kCL = 50 pF
6.0
8.8
1.0
10.0
ns
CL = 50 pF
tOSLH
Output to Output Skew
3.3 ± 0.3
1.5
tOSHL
5.0 ± 0.5
1.0
CIN Input Capacitance
4 10
COUT
Output Capacitance
6
CPD Power Dissipation Capacitance
18
Note 4: Parameter guaranteed by design. tOSLH = |tPLHmax tPLHmin|; tOSHL = |tPHLmax tPHLmin|.
1.5
(Note 4)
ns
CL = 50 pF
1.0 CL = 50 pF
10 pF VCC = Open
pF VCC = 5.0V
pF (Note 5)
Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (OPR.) = CPD * VCC * fIN + ICC/8 (per bit).
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Номер в каталогеОписаниеПроизводители
74VHC541MTCOctal Buffer/Line Driver with 3-STATE OutputsFairchild Semiconductor
Fairchild Semiconductor

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