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PDF 7LVC574APWDH Data sheet ( Hoja de datos )
| Número de pieza | 7LVC574APWDH | |
| Descripción | Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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INTEGRATED CIRCUITS
74LVC574A
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger
(3-State)
Product specification
1998 Jul 29
Philips
Semiconductors
1 page  
Philips Semiconductors
Octal D-type flip-flop with 5-volt tolerant
inputs/outputs; positive edge-trigger (3-State)
Product specification
74LVC574A
ABSOLUTE MAXIMUM RATINGS1
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
CONDITIONS
RATING
UNIT
VCC DC supply voltage
IIK DC input diode current
VI t0
VI DC input voltage
Note 2
IOK DC output diode current
VO uVCC or VO t 0
DC output voltage; output HIGH or LOW state Note 2
VO DC output voltage; output 3-State
Note 2
–0.5 to +6.5
–50
–0.5 to +6.5
"50
–0.5 to VCC +0.5
–0.5 to 6.5
V
mA
V
mA
V
IO
IGND, ICC
Tstg
PTOT
DC output source or sink current
DC VCC or GND current
Storage temperature range
Power dissipation per package
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
VO = 0 to VCC
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
"50
"100
–65 to +150
500
500
mA
mA
°C
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
Temp = -40°C to +85°C
MIN TYP1 MAX
VIH HIGH level Input voltage
VCC = 1.2V
VCC = 2.7 to 3.6V
VCC
2.0
VIL LOW level Input voltage
VCC = 1.2V
VCC = 2.7 to 3.6V
VCC = 2.7V; VI = VIH or VIL; IO = –12mA
VCC*0.5
VOH HIGH level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = –100µA
VCC = 3.0V; VI = VIH or VIL; IO = –18mA
VCC*0.2
VCC*0.6
VCC = 3.0V; VI = VIH or VIL; IO = –24mA
VCC*0.8
VCC = 2.7V; VI = VIH or VIL; IO = 12mA
VOL LOW level output voltage
VCC = 3.0V; VI = VIH or VIL; IO = 100µA
VCC = 3.0V; VI = VIH or VIL; IO = 24mA
II Input leakage current2
VCC = 3.6V; VI = 5.5V or GND
IOZ 3-State output OFF-state current
VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND
Ioff Power off leakage supply
VCC = 0.0V; VI or VO = 5.5V
ICC Quiescent supply current
VCC = 3.6V; VI = VCC or GND; IO = 0
∆ICC
Additional quiescent supply current
per input pin
VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0
NOTES:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
2. The specified overdrive current at the data input forces the data input to the opposite logic input state.
VCC
GND
"0.1
0.1
0.1
0.1
5
GND
0.8
0.40
0.20
0.55
"5
"10
"10
10
500
UNIT
V
V
V
V
µA
µA
µA
µA
µA
1998 Jul 29
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet 7LVC574APWDH.PDF ] | |
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