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PDF MAX1488 Data sheet ( Hoja de datos )

Número de pieza MAX1488
Descripción 15kV ESD-Protected / Quad / Low-Power RS-232 Line Driver
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX1488 Hoja de datos, Descripción, Manual

19-2403; Rev 0; 8/95
±15kV ESD-Protected, Quad, Low-Power
RS-232 Line Driver
_______________General Description
The MAX1488E quad, low-power line driver is designed
for EIA/TIA-232, EIA/TIA-562, and CCITT V.28 commu-
nications in harsh environments. Each transmitter out-
put is protected against ±15kV electrostatic discharge
(ESD) shocks. The inputs are TTL and CMOS compati-
ble with minimal loading. The outputs feature internally
controlled slew-rate limiting and current limiting. This
device has a guaranteed 120kbps data rate. Power-
supply current is less than 180µA over a ±4.5V to
±13.2V supply voltage range.
The MAX1488E is pin compatible with the MC1488,
MC14C88, SN75188, SN75C188, DS1488, and
DS14C88. It is available in 14-pin plastic DIP and SO
packages.
____________________________Features
o ESD Protection:
±15kV—Human Body Model
±6kV—IEC801-2, Contact Discharge
±15kV—IEC801-2, Air-Gap Discharge
o Latchup Free, Even During an ESD Event
o Low 85µA Supply Current from IEE or ICC
o Guaranteed 120kbps Data Rate
o No External Capacitors Required for Slew-Rate
Limiting
o Pin Compatible with MC1488, MC14C88, SN75188,
SN75C188, DS1488, and DS14C88
________________________Applications
PC Motherboards
Modems
Interface Data Terminal Equipment (DTE) with
Data Circuit-Terminating Equipment (DCE)
Equipment Meeting IEC1000-4-2
(formerly IEC801-2) or ±15kV ESD Protection
______________Ordering Information
PART
TEMP. RANGE
MAX1488ECPD
0°C to +70°C
MAX1488ECSD
0°C to +70°C
MAX1488EC/D
0°C to +70°C
MAX1488EEPD -40°C to +85°C
MAX1488EESD -40°C to +85°C
* Dice are specified at TA = +25°C.
PIN-PACKAGE
14 Plastic DIP
14 SO
Dice*
14 Plastic DIP
14 SO
__________Typical Operating Circuit __________________Pin Configuration
14 MAX1488E
14 MAX1489E
TTL/CMOS
LOGIC
INTERCONNECTING
CABLE
TTL/CMOS
LOGIC
14 MAX1489E
14 MAX1488E
SIGNAL GROUND
PC
MOTHERBOARD
(DTE)
MODEM
(DCE)
TOP VIEW
VEE 1
INPUT A 2
OUTPUT A 3
INPUT B1 4
INPUT B2 5
OUTPUT B 6
GND 7
MAX1488E
14 VCC
13 INPUT D1
12 INPUT D2
11 OUTPUT D
10 INPUT C1
9 INPUT C2
8 OUTPUT C
DIP/SO
________________________________________________________________ Maxim Integrated Products 1
Call toll free 1-800-998-8800 for free samples or literature.

1 page




MAX1488 pdf
±15kV ESD-Protected, Quad, Low-Power
RS-232 Line Driver
RC 1M
RD 1500
CHARGE-CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
HIGH-
VOLTAGE
DC
SOURCE
Cs
100pF
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
RC 50M to 100M RD 330
CHARGE-CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
HIGH-
VOLTAGE
DC
SOURCE
Cs
150pF
STORAGE
CAPACITOR
DEVICE
UNDER
TEST
Figure 2a. Human Body ESD Test Model
Figure 3a. IEC1000-4-2 ESD Test Model
IP 100%
90%
Ir PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
AMPERES
36.8%
10%
0
0
tRL
TIME
tDL
CURRENT WAVEFORM
Figure 2b. Human Body Model Current Waveform
I
100%
90%
10%
tr = 0.7ns to 1ns
30ns
60ns
t
Figure 3b. IEC1000-4-2 ESD Generator Current Waveform
IEC1000-4-2
The IEC1000-4-2 standard covers ESD testing and per-
formance of finished equipment; it does not specifically
refer to integrated circuits. The MAX1488E helps you
design equipment that meets Level 4 (the highest level)
of IEC1000-4-2, without additional ESD-protection com-
ponents.
The major difference between tests done using the
Human Body Model and IEC1000-4-2 is higher peak
current in IEC1000-4-2. Because series resistance is
lower in the IEC1000-4-2 ESD test model (Figure 3a),
the ESD withstand voltage measured to this standard is
generally lower than that measured using the Human
Body Model. Figure 3b shows the current waveform for
the ±6kV IEC1000-4-2 Level 4 ESD Contact-Discharge
test.
The Air-Gap test involves approaching the device with
a charged probe. The Contact-Discharge method con-
nects the probe to the device before the probe is ener-
gized.
Machine Model
The Machine Model for ESD testing uses a 200pF stor-
age capacitor and zero-discharge resistance. Its objec-
tive is to mimic the stress caused by contact that
occurs with handling and assembly during manufactur-
ing. Of course, all pins (not just RS-232 inputs and out-
puts) require this protection during manufacturing.
Therefore, the Machine Model is less relevant to the I/O
ports than the Human Body Model and IEC1000-4-2.
__________Applications Information
Use proper layout to ensure other devices on your
board are not damaged in an ESD strike. Currents as
high as 60A can instantaneously pass into the ground,
so it is important to minimize the ground-lead return
path to the power supply. A separate return path to the
power supply is recommended. Trace widths should be
greater than 40 mils. VCC and VEE must be bypassed
with 0.1µF capacitors as close to the part as possible to
ensure maximum ESD protection.
_______________________________________________________________________________________ 5

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