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PDF 80C31X Data sheet ( Hoja de datos )
| Número de pieza | 80C31X | |
| Descripción | CMOS single-chip 8-bit microcontrollers | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Product specification
80C31/80C51/87C51
DESCRIPTION
The Philips 80C31/80C51/87C51 is a high-performance
microcontroller fabricated with Philips high-density CMOS
technology. The CMOS 8XC51 is functionally compatible with the
NMOS 8031/8051 microcontrollers. The Philips CMOS technology
combines the high speed and density characteristics of HMOS with
the low power attributes of CMOS. Philips epitaxial substrate
minimizes latch-up sensitivity.
The 8XC51 contains a 4k × 8 ROM (80C51) EPROM (87C51), a 128
× 8 RAM, 32 I/O lines, two 16-bit counter/timers, a five-source,
two-priority level nested interrupt structure, a serial I/O port for either
multi-processor communications, I/O expansion or full duplex UART,
and on-chip oscillator and clock circuits.
In addition, the device has two software selectable modes of power
reduction—idle mode and power-down mode. The idle mode freezes
the CPU while allowing the RAM, timers, serial port, and interrupt
system to continue functioning. The power-down mode saves the
RAM contents but freezes the oscillator, causing all other chip
functions to be inoperative.
FEATURES
• 8031/8051 compatible
– 4k × 8 ROM (80C51)
– 4k × 8 EPROM (87C51)
– ROMless (80C31)
– 128 × 8 RAM
– Two 16-bit counter/timers
– Full duplex serial channel
– Boolean processor
• Memory addressing capability
– 64k ROM and 64k RAM
• Power control modes:
– Idle mode
– Power-down mode
• CMOS and TTL compatible
• Five speed ranges at VCC = 5V
– 12MHz
– 16MHz
– 24MHz
– 33MHz
• Five package styles
• Extended temperature ranges
• OTP package available
PIN CONFIGURATIONS
P1.0 1
P1.1 2
40 VCC
39 P0.0/AD0
P1.2 3
38 P0.1/AD1
P1.3 4
37 P0.2/AD2
P1.4 5
36 P0.3/AD3
P1.5 6
35 P0.4/AD4
P1.6 7
34 P0.5/AD5
P1.7 8
33 P0.6/AD6
RST 9
RxD/P3.0 10
TxD/P3.1 11
INT0/P3.2 12
CERAMIC
AND
PLASTIC
DUAL
IN-LINE
PACKAGE
32 P0.7/AD7
31 EA/VPP
30 ALE/PROG
29 PSEN
INT1/P3.3 13
28 P2.7/A15
T0/P3.4 14
27 P2.6/A14
T1/P3.5 15
26 P2.5/A13
WR/P3.6 16
25 P2.4/A12
RD/P3.7 17
24 P2.3/A11
XTAL2 18
23 P2.2/A10
XTAL1 19
22 P2.1/A9
VSS 20
21 P2.0/A8
6 1 40
7 39
CERAMIC
AND
PLASTIC
LEAD
CHIP
CARRIER
17 29
18 28
44 34
1 33
PLASTIC
QUAD
FLAT
PACK
11 23
12 22
SEE PAGE 3-6 FOR QFP AND LCC PIN FUNCTIONS.
SU00001
1996 Aug 16
3-3 853–0169 17187
1 page  
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Product specification
80C31/80C51/87C51
BLOCK DIAGRAM
VCC
VSS
RAM ADDR
REGISTER
RAM
P0.0–P0.7
PORT 0
DRIVERS
PORT 0
LATCH
P2.0–P2.7
PORT 2
DRIVERS
PORT 2
LATCH
ROM/EPROM
B
REGISTER
ACC
TMP2
TMP1
STACK
POINTER
ALU
PSW
PCON
TL1
SCON TMOD TCON
TH0 TL0 TH1
SBUF IE
IP
INTERRUPT, SERIAL
PORT AND TIMER BLOCKS
PSEN
ALE/PROG
EA/VPP
RST
TIMING
AND
CONTROL
PD
OSCILLATOR
XTAL1
XTAL2
PORT 1
LATCH
PORT 1
DRIVERS
P1.0–P1.7
PORT 3
LATCH
PORT 3
DRIVERS
P3.0–P3.7
PROGRAM
ADDRESS
REGISTER
BUFFER
PC
INCRE-
MENTER
PROGRAM
COUNTER
DPTR
SU00005
1996 Aug 16
3-7
5 Page 
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Product specification
80C31/80C51/87C51
DC ELECTRICAL CHARACTERISTICS FOR PHILIPS NORTH AMERICA DEVICES (SC80C31 AND SC80C51)
Tamb = 0°C to +70°C or –40°C to +85°C, VCC = 5V ±10%; VSS = 0V
SYMBOL
PARAMETER
TEST
CONDITIONS
LIMITS
MIN
TYP1
MAX
UNIT
VIL
VIH
VIH1
VOL
VOL1
VOH
VOH1
IIL
ITL
Input low voltage
Input high voltage (ports 0, 1, 2, 3, EA)
Input high voltage, XTAL1, RST
Output low voltage, ports 1, 2, 38
Output low voltage, port 0, ALE, PSEN8, 7
Output high voltage, ports 1, 2, 3 3
Output high voltage (port 0 in external bus mode),
ALE9, PSEN3
Logical 0 input current, ports 1, 2, 3
Logical 1-to-0 transition current, ports 1, 2, 36
4.5V < VCC < 5.5V
VCC = 4.5V
IOL = 1.6mA2
VCC = 4.5V
IOL = 3.2mA2
VCC = 4.5V
IOH = –30µA
VCC = 4.5V
IOH = –3.2mA
VIN = 0.4V
VIN = 2.0V
See note 4
–0.5
0.2VCC+0.9
0.7VCC
VCC – 0.7
VCC – 0.7
–1
0.2VCC–0.1
VCC+0.5
VCC+0.5
0.4
V
V
V
V
0.4 V
V
–50
–650
V
µA
µA
ILI Input leakage current, port 0
0.45 < VIN < VCC – 0.3
±10 µA
ICC Power supply current (see Figure 8):
Active mode @ 16MHz5
Idle mode @ 16MHz5
Power-down mode
See note 5
Tamb = 0 to +70°C
Tamb = –40 to +85°C
11.5 32
1.3 5
3 50
75
µA
µA
µA
µA
RRST
Internal reset pull-down resistor
40 225 kΩ
CIO Pin capacitance10 (except EA)
15 pF
NOTES:
1. Typical ratings are not guaranteed. The values listed are at room temperature, 5V.
2. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOLs of ALE and ports 1 and 3. The noise is due
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input. IOL can exceed these conditions provided that no
single output sinks more than 5mA and no more than two outputs exceed the test conditions.
3. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the (VCC–0.7) specification when the
address bits are stabilizing.
4. Pins of ports 1, 2 and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when VIN is approximately 2V.
5. See Figures 9 through 12 for ICC test conditions.
Active Mode: ICC = 1.5 × FREQ + 8.0;
Idle Mode:
ICC = 0.14 × FREQ +2.31; See Figure 8.
6. This value applies to Tamb = 0°C to +70°C. For Tamb = –40°C to +85°C, ITL = –750µA.
7. Load capacitance for port 0, ALE, and PSEN = 100pF, load capacitance for all other outputs = 80pF.
8. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin:
15mA (*NOTE: This is 85°C specification.)
Maximum IOL per 8-bit port:
26mA
Maximum total IOL for all outputs: 71mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed
test conditions.
9. ALE is tested to VOH1, except when ALE is off then VOH is the voltage specification.
10. Pin capacitance is characterized but not tested. Pin capacitance is less than 25pF. Pin capacitance of ceramic package is less than 15pF
(except EA it is 25pF).
1996 Aug 16
3-13
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet 80C31X.PDF ] | |
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