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What is 82C54?

This electronic component, produced by the manufacturer "Intel Corporation", performs the same function as "CHMOS PROGRAMMABLE INTERVAL TIMER".


82C54 Datasheet PDF - Intel Corporation

Part Number 82C54
Description CHMOS PROGRAMMABLE INTERVAL TIMER
Manufacturers Intel Corporation 
Logo Intel Corporation Logo 


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82C54
CHMOS PROGRAMMABLE INTERVAL TIMER
Y Compatible with all Intel and most
other microprocessors
Y High Speed ‘‘Zero Wait State’’
Operation with 8 MHz 8086 88 and
80186 188
Y Handles Inputs from DC
10 MHz for 82C54-2
Y Available in EXPRESS
Standard Temperature Range
Extended Temperature Range
Y Three independent 16-bit counters
Y Low Power CHMOS
ICC e 10 mA 8 MHz Count
frequency
Y Completely TTL Compatible
Y Six Programmable Counter Modes
Y Binary or BCD counting
Y Status Read Back Command
Y Available in 24-Pin DIP and 28-Pin PLCC
The Intel 82C54 is a high-performance CHMOS version of the industry standard 8254 counter timer which is
designed to solve the timing control problems common in microcomputer system design It provides three
independent 16-bit counters each capable of handling clock inputs up to 10 MHz All modes are software
programmable The 82C54 is pin compatible with the HMOS 8254 and is a superset of the 8253
Six programmable timer modes allow the 82C54 to be used as an event counter elapsed time indicator
programmable one-shot and in many other applications
The 82C54 is fabricated on Intel’s advanced CHMOS III technology which provides low power consumption
with performance equal to or greater than the equivalent HMOS product The 82C54 is available in 24-pin DIP
and 28-pin plastic leaded chip carrier (PLCC) packages
231244 – 3
PLASTIC LEADED CHIP CARRIER
231244 –1
Figure 1 82C54 Block Diagram
October 1994
231244 – 2
Diagrams are for pin reference only
Package sizes are not to scale
Figure 2 82C54 Pinout
Order Number 231244-006

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82C54 equivalent
82C54
OPERATIONAL DESCRIPTION
General
After power-up the state of the 82C54 is undefined
The Mode count value and output of all Counters
are undefined
How each Counter operates is determined when it is
programmed Each Counter must be programmed
before it can be used Unused counters need not be
programmed
Programming the 82C54
Counters are programmed by writing a Control Word
and then an initial count The control word format is
shown in Figure 7
All Control Words are written into the Control Word
Register which is selected when A1 A0 e 11 The
Control Word itself specifies which Counter is being
programmed
By contrast initial counts are written into the Coun-
ters not the Control Word Register The A1 A0 in-
puts are used to select the Counter to be written
into The format of the initial count is determined by
the Control Word used
Control Word Format
A1 A0 e 11 CS e 0 RD e 1 WR e 0
D7 D6 D5 D4 D3 D2 D1 D0
SC1 SC0 RW1 RW0 M2 M1 M0 BCD
SC Select Counter
SC1 SC0
0 0 Select Counter 0
0 1 Select Counter 1
1 0 Select Counter 2
1
1
Read-Back Command
(See Read Operations)
RW Read Write
RW1 RW0
0 0 Counter Latch Command (see Read
Operations)
0 1 Read Write least significant byte only
1 0 Read Write most significant byte only
1 1 Read Write least significant byte first
then most significant byte
NOTE Don’t care bits (X) should be 0 to insure
compatibility with future Intel products
M MODE
M2 M1
M0
0 0 0 Mode 0
0 0 1 Mode 1
X 1 0 Mode 2
X 1 1 Mode 3
1 0 0 Mode 4
1 0 1 Mode 5
BCD
0
1
Binary Counter 16-bits
Binary Coded Decimal (BCD) Counter
(4 Decades)
Figure 7 Control Word Format
5


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Part Details

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Information Total 18 Pages
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