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PDF NE57814 Data sheet ( Hoja de datos )
| Número de pieza | NE57814 | |
| Descripción | DDR memory termination regulator with standby mode and enhanced efficiency | |
| Fabricantes | Philipss | |
| Logotipo |  |
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INTEGRATED CIRCUITS
NE57814
DDR memory termination regulator with
standby mode and enhanced efficiency
Product data
Supersedes data of 2003 Jan 22
2003 Apr 03
Philips
Semiconductors
1 page  
Philips Semiconductors
DDR memory termination regulator with
standby mode and enhanced efficiency
TYPICAL PERFORMANCE CURVES
Product data
NE57814
Figure 3. VTT transient response
(output filter 50 µF ceramic)
SL01687
Figure 4. VDD-to-VTT response
(output filter 50 µF ceramic)
SL01688
Figure 5. Vref-to-VTT transient response
(output filter 820 µF + 50 µF ceramic)
SL01686
Figure 6. Vref-to-VTT transient response
(output filter 50 µF ceramic)
SL01685
2003 Apr 03
5
5 Page 
Philips Semiconductors
DDR memory termination regulator with
standby mode and enhanced efficiency
Product data
NE57814
Cascading the NE57814 for complex memory
systems
For high-performance computer systems, such as workstations and
servers, where two or more banks of independent memory arrays
are needed, the NE57814 can be cascaded to provide two
independent, but slaved termination systems. This type of
architecture allows the termination voltages to be within 12 mV of
one another, and the VTT can be controlled from a single node.
Cascading NE57814 terminators offers two advantages; memory
SIMMs can be brought closer to the terminator, which improves the
system noise, and it will better distribute any heat generated by the
terminator system. Use the RefOut pin from one NE57814 to the
ExtRefIn pin for the other NE57814(s) in the system to ensure that
the VTT voltages are identical.
The output of the NE57814 is a very low impedance voltage source
which means that the VTT outputs should never be wired together.
That is, NE57814s should never be wired in parallel. This is
because the terminators would “fight” one another if their output
were different by only a few millivolts.
The cascading method can be seen in Figure 13.
INPUT VOLTAGE
( > VTT + 0.25 V )
10 µF
(Y5V)
470 µF
(Electro)
VD
RefOut
0.1 µF
(Y5V)
0.1 µF
(Y5V)
VDD
ExtRefIn
NE57814
VTT SENSE
VSS
VTT
INPUT VOLTAGE
( > VTT + 0.25 V )
0.1 µF
(Y5V)
Vref
50 µF
(Y5V)
VTT
100 µF
(Electro)
VD ExtRefIn
RefOut
NE57814
VDD
VTT SENSE
VSS
VTT
0.1 µF
(Y5V)
50 µF
(Y5V)
Figure 13. Cascading terminator systems for complex memory systems.
SL01887
2003 Apr 03
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet NE57814.PDF ] | |
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