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PDF NJU3554 Data sheet ( Hoja de datos )
| Número de pieza | NJU3554 | |
| Descripción | 4-BIT SINGLE CHIP OTP MICRO CONTROLLER | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de NJU3554 (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
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NJU3554
PRELIMINARY
4-BIT SINGLE CHIP OTP MICRO CONTROLLER
s GENERAL DESCRIPTION
The NJU3554 is the C-MOS 4-bit Single Chip OTP type
Micro Controller with programmable Flash Memory.
It is completely compatible with the NJU3504 in function
and the pin configuration. Therefore, the NJU3554 is
suitable for the final evaluation before NJU3504 mask
generation, the small quantity production and short lead-
time.
s PACKAGE OUTLINE
* In this data sheet, only OTP programming and the
difference between NJU3554 and NJU3504 are
mentioned mainly.
Therefore the detail function and specification should
be referred on the NJU3504 data sheet.
NJU3554FA1
NJU3554L
s FEATURES
q Internal One Time Programmable ROM 4,096 X 8bits
q Internal Data RAM
256 X 4bits
q Wide operating voltage range
2.7V ~ 5.5V
q Package outline
QFP44-A1 / SDIP42 (Compatible with NJU3504)
q ROM programmer “SUPERPRO/L” by XELTEK co,.
s PIN CONFIGURATION IN OTP PROGRAMMING MODE
[ QFP44-A1 ]
[ SDIP42 ]
Open
RESET
PROM
CLK
REQ
VSS
1
2
3
4
5
6
7
8
9
10
11
NJU3554FA1
33 VDD
32 Open
31 D5
30 D4
29 D3
28 D2
27 Open
26 D1
25 D0
24 Open
23
CNT1
CNT2
Open
RESET
PROM
CLK
REQ
VSS
VSS
Open
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
42
41
40
Open
39
38 D7
37 D6
36 VDD
35 Open
34 D5
33 D4
32 D3
31 D2
30 Open
29 D1
28 D0
27
26
25
24
Open
23
22
Note) The pin configuration in Normal operating mode is the same as NJU3504.
-1-
1 page  
NJU3554
s ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS 1-1
PARAMETER
SYM
BOL
CONDITIONS
Supply Voltage
VDD VDD
VDD
IDD1 VDD=5V, fOSC=2MHz
X’tal Oscillation in Reset
VDD
IDD2 VDD=5V, fOSC=2MHz
Ceramic Oscillation in Reset
Supply Current
VDD
IDD3 VDD=5V, fOSC=2MHz
CR Oscillation in Reset
VDD
IDD4 VDD=5V, fOSC=4MHz
Operating (Except ADC)
IDD5
VDD
VDD=5V, STANDBY Mode
IADD
AVDD
AVDD=VDD=5V, ADCK=225kHz
PA0~PA3, PB0~PB3, PC0, PC1,
VIH1
PD0~PD3, PE0~PE3,
AIN0/PI0~AIN3/PI3, SDI(O)/PL1,
High-Level
Input Voltage
SCK/CKOUT
PF0~PF2, PG0, PG1, PH0, PH1,
VIH2 VREF/PJ0, ADCK/PJ1, EXTI/PK0,
CNTI/PK1, RESET
VIH3 OSC1
PA0~PA3, PB0~PB3, PC0, PC1,
VIL1
PD0~PD3, PE0~PE3,
AIN0/PI0~AIN3/PI3, SDI(O)/PL1,
Low-level
Input Voltage
SCK/CKOUT
PF0~PF2, PG0, PG1, PH0, PH1,
VIL2 VREF/PJ0, ADCK/PJ1, EXTI/PK0,
CNTI/PK1, RESET
VIL3 OSC1
*1 Input/output port is set as an Input terminal.
*2 Input/output port is set as an Output terminal.
*3 Except the current through Pull-up resister.
(VDD=3.6~5.5V, VSS=0V, Ta=-20~75°C)
MIN TYP MAX UNIT NOTE
3.6 5.5 V
30 mA *3
30 mA *3
30 mA *3
30 mA *3
20 µA *3
3.0 5.0 mA *3
0.7VDD
VDD V *1
0.8VDD
VDD-1.0
0
VDD V
VDD V
0.3VDD V
*1
*1
0 0.2VDD V *1
0 1.0 V
-5-
5 Page 
NJU3554
s ELECTRICAL CHARACTERISTICS AC CHARACTERISTICS 2 SERIAL INTERFACE
PARAMETER
SYM
BOL
CONDITIONS
Serial Operating
Frequency
fSC
Internal Clock
External Clock
Clock Pulse Width
Low-Level
tSCL
Internal Clock
VDD=2.7~3.6V
fOSC=2MHz
VDD=3.6~5.5V
fOSC=4MHz
External Clock
VDD=2.7~3.6V
Clock Pulse Width
High-Level
tSCH
Internal Clock
fOSC=2MHz
VDD=3.6~5.5V
fOSC=4MHz
External Clock
SDI setup Time
To SCK
tDS
SDI Hold time
To SCK
tDH
SDO Data
Fix Time To SCK
tDCD
* The dividing ratio of the internal clock is 1/2.
(VSS=0V, VDD=2.7~5.5V, Ta= -20~75°C)
MIN TYP MAX UNIT
(1/12)×fOSC* Hz
500k
3.0
1.5 µs
1.0
3.0
1.5 µs
1.0
0.5 µs
0.5 µs
0.5 µs
s AC CHARACTERISTICS 2 SERIAL INTERFACE TIMING CHART
SCK
1/fSC
tSCL
tSCH
VIH1
VIL1
SDI(O)
SDO/SDI(O)
tDS tDH
INPUT DATA
tDCD
VOH
VOL1
OUTPUT DATA
VIH1
VIL1
- 11 -
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet NJU3554.PDF ] | |
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