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PDF NLAST4051 Data sheet ( Hoja de datos )
| Número de pieza | NLAST4051 | |
| Descripción | Analog Multiplexer / Demultiplexer | |
| Fabricantes | ON | |
| Logotipo |  |
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NLAST4051
Analog Multiplexer/
Demultiplexer
TTL Compatible, Single−Pole, 8−Position
Plus Common Off
The NLAST4051 is an improved version of the MC14051 and
MC74HC4051 fabricated in sub−micron Silicon Gate CMOS technology
for lower RDS(on) resistance and improved linearity with low current.
This device may be operated either with a single supply or dual supply up
to ±3 V to pass a 6 VPP signal without coupling capacitors.
When operating in single supply mode, it is only necessary to tie
VEE, pin 7 to ground. For dual supply operation, VEE is tied to a
negative voltage, not to exceed maximum ratings. Translation is
provided in the device, the Address and Inhibit are standard TTL level
compatible. For CMOS compatibility see NLAS4051. Pin for pin
compatible with all industry standard versions of ‘4051.’
Features
• Improved RDS(on) Specifications
• Pin for Pin Replacement for MAX4051 and MAX4051A
− One Half the Resistance Operating at 5.0 V
• Single or Dual Supply Operation
− Single 3.0 − 5.0 V Operation, or Dual ±3 V Operation
− With VCC of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
− No Translators Needed
− Address and Inhibit Logic are Over−Voltage Tolerant and May Be
− Driven Up +6 V Regardless of VCC
• Address and Inhibit Pins Standard TTL Compatible
− Greatly Improved Noise Margin Over MAX4051 and MAX4051A
− True TTL Compatibility VIL = 0.8 V, VIH = 2.0 V
• Improved Linearity Over Standard HC4051 Devices
• Space Saving TSSOP Package
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
VCC NO2 NO4 NO0 NO6 ADDC ADDB ADDA
16 15 14 13 12 11 10 9
www.onsemi.com
MARKING
DIAGRAM
16
TSSOP−16
AST
DT SUFFIX
4051
CASE 948F
ALYWG
1G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
12345678
NO1 NO3 COM NO7 NO5 Inhibit VEE GND
Figure 1. Pin Connection
(Top View)
© Semiconductor Components Industries, LLC, 2015
November, 2015 − Rev. 5
1
Publication Order Number:
NLAST4051/D
1 page  
NLAST4051
TYPICAL CHARACTERISTICS
100
10
1
0.1
0.01
0.001
VCC = 3.0 V
0.0001
0.00001
−40 −20
VCC = 5.0 V
0 20 60 80 100 120
Temperature (°C)
Figure 3. ICC versus Temp, VCC = 3 V and 5 V
100
80 2.0 V
60
40
$3.3 V
20
3.0 V
4.5 V
5.5 V
0
−4.0 −2.0
0 2.0 4.0 6.0
VIS (VDC)
Figure 4. RON versus VCC, Temp = 255C
100
90 125°C
80
70 25°C
60
50
40
30
20
10
85°C
−55°C
0
0.5 1.0
1.5
VCom (V)
Figure 5. Typical On Resistance
VCC = 2.0 V, VEE = 0 V
25
125°C
85°C
20
50
125°C
40 85°C
25°C
30
20
−55°C
10
0
2.0 0 0.5 1.0 1.5 2.0 2.5 3.0
VCom (V)
Figure 6. Typical On Resistance
VCC = 3.0 V, VEE = 0 V
25
85°C
20
125°C
15
10
25°C
−55°C
5
15
10
5
25°C
−55°C
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
VCom (V)
Figure 7. Typical On Resistance
VCC = 4.5 V, VEE = 0 V
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
VCom (V)
Figure 8. Typical On Resistance
VCC = 5.5 V, VEE = 0 V
www.onsemi.com
5
5 Page 
NLAST4051
PACKAGE DIMENSIONS
0.15 (0.006) T U S
16
2X L/2
L
PIN 1
IDENT.
1
0.15 (0.006) T U S
0.10 (0.004)
−T− SEATING
PLANE
D
C
TSSOP−16
DT SUFFIX
CASE 948F
ISSUE B
16X K REF
0.10 (0.004) M T U S V S
9
B
−U− J
8
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
K
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH. PROTRUSIONS OR GATE BURRS.
J1 ÇÇÉÉÇÇÉÉK1ÇÇÉÉ
SECTION N−N
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
0.25 (0.010)
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
A
−V−
M
N
F
DETAIL E
−W−
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC
0.026 BSC
H 0.18 0.28 0.007 0.011
J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC
0.252 BSC
M 0_ 8_ 0_ 8_
H DETAIL E
G
SOLDERING FOOTPRINT
7.06
1
16X
0.36
16X
1.26
0.65
PITCH
DIMENSIONS: MILLIMETERS
www.onsemi.com
11
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