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PDF NM27LV210 Data sheet ( Hoja de datos )
| Número de pieza | NM27LV210 | |
| Descripción | 1 /048 /576-Bit (64K x 16) Low Voltage EPROM | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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NM27LV210
1,048,576-Bit (64K x 16) Low Voltage EPROM
General Description
The NM27LV210 is a high performance Low Voltage Electrical
Programmable read only memory. It is manufactured using
Fairchild’s latest EPROM technology. This technology allows the
part to operate at high speeds.
This Low Voltage and Low Power EPROM is designed with power
sensitive hand held and portable battery products in mind. This
allows for code storage of firmware for applications like notebook
computers, palm top computers, cellular phones, and HDD.
The NM27LV210 is one member of Fairchild’s growing Low
Voltage product family.
Features
s 3.0V to 3.6V operation
s 200 ns, 250 ns maximum access time
s Low current operation
— 20mA ICC active current @ 5 MHz
— 50µA ICC standby current @ 5 MHz
s Ultra low power operation
— 60 µA standby power @ 3.3V
— 50 mW active power @ 3.3V
s Surface mount package option
— 44-Pin PLCC
Block Diagram
Vcc
GND
Vpp
OE
PGM
CE
A0 - A15
Address
Inputs
Output Enable
Chip Enable, and
Program Logic
Y
Decoder
X
Decoder
Data Outputs O0 - O15
Output
Buffers
1,048,576-Bit
Cell Matrix
July 1998
DS011376-1
© 1998 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
1 page  
Programming Characteristics (Note 12) (Note 13) (Note 14) (Note 15) (Continued)
Symbol
tPW
tOE
IPP
ICC
TA
VCC
VPP
tFR
VIL
VIH
tIN
tOUT
Parameter
Program Pulse Width
Data Valid from OE
VPP Supply Current during
Programming Pulse
VCC Supply Current
Temperature Ambient
Power Supply Voltage
Programming Supply Voltage
Input Rise, Fall Time
Input Low Voltage
Input High Voltage
Input Timing Reference Voltage
Output Timing Reference Voltage
Conditions
CE = VIL
CE = VIL
PGM = VIL
Min Typ Max Units
45 50 105 µs
100 ns
40 mA
50
20 25 30
6.25 6.5 6.75
12.5 12.75 13.0
5
0.0 0.45
2.4 4.0
0.8 2.0
0.8 2.0
mA
°C
V
V
ns
V
V
V
V
Programming Waveforms (Note 14)
Addresses
2.0V
0.8V
Data
2.0V
0.8V
VCC
6.25V
VPP 12.75V
Program
Address N
t AS
Data In Stable
ADD N
t DS t DH
Hi-Z
t VCS
t VPS
Program Verify
Data Out Valid
ADD N
t DF
CE 0.8V
PGM
2.0V
0.8V
OE 2.0V
0.8V
t CES
t PW
t OES
t OE
DS011376-5
Note 12: Fairchild’s standard product warranty applies only to devices programmed to specifications described herein.
Note 13: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP. The EPROM must not be inserted into or removed from a board with
voltage applied to VPP or VCC.
Note 14: The maximum absolute allowable voltage which may be applied to the VPP pin during programming is 14V. Care must be taken when switching the VPP supply to
prevent any overshoot from exceeding this 14V maximum specification. At least a 0.1 µF capacitor is required across VPP, VCC to GND to suppress spurious voltage transients
which may damage the device.
Note 15: During power up the PGM pin must be brought high (≥VIH) either coincident with or before power is applied to VPP.
5 www.fairchildsemi.com
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet NM27LV210.PDF ] | |
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