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даташит 87C257 PDF ( Datasheet )

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Номер произв 87C257
Описание ADDRESS LATCHED 256K 32K x 8 UV EPROM and OTP EPROM
Производители STMicroelectronics
логотип STMicroelectronics логотип 



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87C257 Даташит, Описание, Даташиты
M87C257
ADDRESS LATCHED
256K (32K x 8) UV EPROM and OTP EPROM
INTEGRATED ADDRESS LATCH
FAST ACCESS TIME: 45ns
LOW POWER “CMOS” CONSUMPTION:
– Active Current 30mA
– Standby Current 100µA
PROGRAMMING VOLTAGE: 12.75V
ELECTRONIC SIGNATURE for AUTOMATED
PROGRAMMING
PROGRAMMING TIMES of AROUND 3sec.
(PRESTO II ALGORITHM)
28
1
FDIP28W (F)
PLCC32 (C)
DESCRIPTION
The M87C257 is a high speed 262,144 bit UV
erasable and electrically programmable EPROM.
The M87C257 incorporates latches for all address
inputs to minimize chip count, reduce cost, and
simplify the design of multiplexed bus systems.
The Window Ceramic Frit-Seal Dual-in-Line pack-
age has a transparent lid which allows the user to
expose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M87C257 is offered in Plastic Leaded Chip Carrier,
package.
Table 1. Signal Names
A0 - A14
Address Inputs
Q0 - Q7
Data Outputs
E Chip Enable
G Output Enable
ASVPP
VCC
VSS
Address Strobe / Program Supply
Supply Voltage
Ground
Figure 1. Logic Diagram
VCC
15
A0-A14
E
G
ASVPP
M87C257
VSS
8
Q0-Q7
AI00928B
June 1996
1/13









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87C257 Даташит, Описание, Даташиты
M87C257
Figure 2A. DIP Pin Connections
Figure 2B. LCC Pin Connections
ASVPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
Q0
Q1
Q2
VSS
1 28
2 27
3 26
4 25
5 24
6 23
7 22
M87C257
8 21
9 20
10 19
11 18
12 17
13 16
14 15
VCC
A14
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5
Q4
Q3
AI00929
A6
A5
A4
A3
A2 9
A1
A0
NC
Q0
1 32
M87C257
17
A8
A9
A11
NC
25 G
A10
E
Q7
Q6
AI00930
Warning: NC = Not Connected, DU = Dont’t Use.
Table 2. Absolute Maximum Ratings (1)
Symbol
Parameter
Value
Unit
TA Ambient Operating Temperature
–40 to 125
°C
TBIAS
Temperature Under Bias
–50 to 125
°C
TSTG
VIO (2)
Storage Temperature
Input or Output Voltages (except A9)
–65 to 150
–2 to 7
°C
V
VCC
VA9 (2)
Supply Voltage
A9 Voltage
–2 to 7
–2 to 13.5
V
V
VPP Program Supply Voltage
–2 to 14
V
Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other
relevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
DEVICE OPERATION
The modes of operation of the M87C257 are listed
in the Operating Modes. A single power supply is
required in the read mode. All inputs are TTL levels
except for VPP and 12V on A9 for Electronic Signa-
ture.
Read Mode
The M87C257 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
2/13









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87C257 Даташит, Описание, Даташиты
M87C257
Table 3. Operating Modes
Mode
E
Read (Latched Address)
VIL
Read (Applied Address)
VIL
Output Disable
VIL
Program
VIL Pulse
Verify
VIH
Program Inhibit
VIH
Standby
VIH
Electronic Signature
Note: X = VIH or VIL, VID = 12V ± 0.5V
VIL
G
VIL
VIL
VIH
VIH
VIL
VIH
X
VIL
A9
ASVPP
Q0 - Q7
X VIL Data Out
X VIH Data Out
X X Hi-Z
X VPP Data In
X VPP Data Out
X VPP Hi-Z
X X Hi-Z
VID VIL Codes
Table 4. Electronic Signature
Identifier
A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code VIL
0
0
1
0
0
0
0
0
Device Code
VIH 1 0 0 0 0 0 0 0
20h
80h
be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable (AS = VIH) or latched (AS =
VIL), the address access time (tAVQV) is equal to the
delay from E to output (tELQV). Data is available at
the output after delay of tGLQV from the falling edge
of G, assuming that E has been low and the ad-
dresses have been stable for at least tAVQV-tGLQV.
The M87C257 reduces the hardware interface in
multiplexed address-data bus systems. The proc-
essor multiplexed bus (AD0-AD7) may be tied to
the M87C257’s address and data pins. No sepa-
rate address latch is needed because the
M87C257 latches all address inputs when AS is
low.
Standby Mode
The M87C257 has a standby mode which reduces
the active current from 30mA to 100µA (Address
Stable). The M87C257 is placed in the standby
mode by applying a CMOS high signal to the E
input. When in the standby mode, the outputs are
in a high impedance state, independent of the G
input.
Two Line Output Control
Because EPROMs are usually used in larger mem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
control bus. This ensures that all deselected mem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is desired from a particular memory device.
3/13










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