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PDF NT6880 Data sheet ( Hoja de datos )
| Número de pieza | NT6880 | |
| Descripción | Keyboard Controller | |
| Fabricantes | ETC | |
| Logotipo |  |
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NT6880
Features
T Built-in 6502 8-bit CPU
T 2 MHz CPU operation frequency
T 5K bytes of ROM
T 160 bytes of SRAM
T One 8-bit programmable base timer with
1 - 256 µsec interval
T 29 programmable bi-directional I/O pins
T 3 LED direct sink pins
Keyboard Controller
T Mask optional for built-in RC oscillator with an
external resistor or external ceramic resonator applied
T Mask optional for DATA/CLK driving capability
T Watch-dog timer reset
T Built-in power-on reset
T Built-in low voltage reset
T CMOS technology for low power consumption
T Available in 40 pin DIP package and 40 pad Chip
Form
General Description
The NT6880 is a single chip micro-controller for
keyboard applications. It incorporates a 6502 8-bit CPU
core, 5K bytes of ROM and 160 bytes of RAM used as
working RAM and stack area. It also includes 29
programmable bi-directional I/O pins and one 8-bit pre-
loadable base timer. Additionally, it includes a built-in
low voltage reset, a 4MHz RC oscillator requiring an
externally applied resistor or a 4MHz ceramic resonator
and a watch-dog timer that prevents system standstill.
Pin Configuration
GND
NC
DATA
CLK
P30
P31
P32
P33
P34
RESET
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 OSCI
39 R/OSCO
38 VDD
37 LED2
36 LED1
35 LED0
34 P27
33 P26
32 P25
31 P24
30 P23
29 P22
28 P21
27 P20
26 P17
25 P16
24 P15
23 P14
22 P13
21 P12
Pad Configuration
PPPPPPPPPP
1111111100
7654321076
26 25 24 23 22 21 20 19 18 17
16 P05
15 P04
P20 27
14 P03
P21 28
13 P02
P22 29
12 P01
P23 30
P24 31
NT6880H
11 P00
10 RESET
P25 32
9 P34
P26 33
8 P33
P27 34
7 P32
LED0
LED1
35
36
37 38 39 40 1
2345
6 P31
LVR OG
E D / SN
D DO CD
2 SI
C
O
NDCP
CAL 3
TK0
A
1 V1.0
1 page  
6. Timing Generator
This block generates the system timing and control
signal supplied to the CPU and on-chip peripherals.
There are two types of system clock sources: built-in RC
oscillator or external ceramic resonator. Both are mask
optional and generate a 4MHz system clock. They also
generate 2MHz for the CPU, and 1 MHz for base timer.
NT6880
The following table provides the relationship between
external resistor and RC OSC frequency. (for reference
only)
External Resistor
(KΩ )
39
43
47
56
RC OSC Frequency (MHz)
4.7
4.44
4
3.68
7. Base Timer (BT)
The base timer is an 8-bit counter with a 1MHz clock source. The base timer can be enabled/disabled by CPU. After reset,
the base timer is disabled and cleared. The base timer can be preset by writing BT7 - BT0 to the BT register at any time.
When enabled, the base timer starts counting from the preset value. When the value reaches FFH, it generates a timer
interrupt if the timer interrupt is enabled. When it reaches the maximum value of FFH, the base timer will wrap around and
begin counting at 00H. The timer interval can be programmed from 1 - 256 µsec. The base timer can be enabled by writing
a '0' to ' ENBT ' in the TCON (Timer Control) register. The ENBT is a level trigger.
Base timer structure:
8-Bit timer
1µs BT7 BT6 BT5 BT4 BT2 BT2 BT1 BT0
TMRINT
BT pre-load data:
Addr.
$00C0
Bit
BT
Timer Control Register:
7654321
0 R/W
BT7 BT6 BT5 BT4 BT3 BT2 BT1 BT0 (W)
$00C1 TCON
-
-
-
-
-
-
- ENBT (W)
8. Interrupt Controller
When a BASE TIMER overflow occurs, it will set the IRQTMR flag. The IRQTMR flag cannot be directly accessed by the
software. Once set by an interrupt source, it remains High unless cleared by writing '1' to the corresponding bit in
CLRIRQX ($00C2H). This register is cleared to '0' on initialization by a system reset.
When an interrupt occurs, the CPU will jump to $FFFEH & $FFFFH to execute an interrupt service routine. When the
BASE TIMER interrupt occurs and enters an interrupt service routine, the IRQTMR flag must be cleared by the software.
Interrupt Control Register:
Addr.
$00C2
Bit 7 6 5 4 3 2 1
0 R/W
CLRIRQX - - - - - - - CLRIRQTMR (W)
5
5 Page 
NT6880
Bonding Diagram
PPPPPPPPPP
1111111100
7654321076
26 25 24 23 22 21 20 19 18 17
16 P05
P20 27
NT6880H
15 P04
14 P03
P21 28
P22 29
Y 13 P02
12 P01
P23 30
P24 31
(0, 0)
X
11 P00
1760 µm
10 RESET
P25 32
9 P34
P26 33
8 P33
P27 34
7 P32
LED0
LED1
35
36
37 38 39 40 1
2345
6 P31
L VR OG
E D / SN
D DO CD
2 SI
C
O
NDCP
CA L 3
TK0
A
2000 µm
Pad No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Designation
GND
NC
DATA
CLK
P30
P31
P32
P33
P34
RESET
P00
P01
P02
P03
P04
P05
P06
P07
P10
P11
X
-126.4
3.6
133.6
393.6
619.4
865.0
870.2
870.2
870.2
870.2
870.2
870.2
870.2
870.2
870.2
870.2
374.1
244.1
114.1
-15.9
*Substrate Connect to VDD
Y
-687.1
-752.0
-752.0
-752.0
-752.0
-733.1
-435.6
-305.6
-175.6
-45.6
84.4
214.4
344.4
474.4
604.4
746.9
752.5
752.5
752.5
752.5
Pad No.
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Designation
P12
P13
P14
P15
P16
P17
P20
P21
P22
P23
P24
P25
P26
P27
LED0
LED1
LED2
VDD
R/OSCO
OSCI
unit: µm
X
-145.9
-275.9
-405.9
-535.9
-665.9
-808.4
-870.2
-870.2
-870.2
-870.2
-870.2
-870.2
-870.2
-870.2
-870.2
-870.2
-646.4
-516.4
-386.4
-256.4
Y
752.5
752.5
752.5
752.5
752.5
752.5
544.3
414.3
284.3
154.3
24.3
-105.7
-235.7
-365.7
-495.7
-641.8
-636.6
-636.6
-636.6
-636.6
11
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet NT6880.PDF ] | |
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