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PDF NTD20P06L Data sheet ( Hoja de datos )

Número de pieza NTD20P06L
Descripción Power MOSFET -60 V / -15.5 A / Single P-Channel / DPAK
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NTD20P06L
Power MOSFET
−60 V, −15.5 A, Single P−Channel, DPAK
Features
Withstands High Energy in Avalanche and Commutation Modes
Low Gate Charge for Fast Switching
Pb−Free Packages are Available
Applications
Bridge Circuits
Power Supplies, Power Motor Controls
DC−DC Conversion
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source
Continuous
Voltage
Non−Repetitive tp v10 ms
Continuous
Drain Current
(Note 1)
Steady State TA = 25°C
VDSS
VGS
VGSM
ID
−60
$20
$30
−15.5
V
V
A
Power Dissipa-
tion (Note 1)
Steady State TA = 25°C
PD
65 W
Pulsed Drain
Current
tp = 10 ms
IDM $50 A
Operating Junction and Storage Temperature
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 25 V, VGS = 5 V, IPK = 15 A,
L = 2.7 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TJ,
TSTG
EAS
−55 to
175
304
°C
mJ
TL 260 °C
THERMAL RESISTANCE RATINGS
Parameter
Symbol Max Unit
Junction−to−Case (Drain)
RqJC
2.3 °C/W
Junction−to−Ambient – Steady State (Note 1)
RqJA
80
Junction−to−Ambient – Steady State (Note 2)
RqJA
110
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface−mounted on FR4 board using 1 in sq. pad size
(Cu area = 1.127 in sq. [1 oz] including traces)
2. Surface−mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.412 in sq.)
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V(BR)DSS
−60 V
RDS(on) TYP
130 mW @ −5.0 V
ID MAX
(Note 1)
−15.5 A
P−Channel
D
G
4
12
3
DPAK
CASE 369C
Style 2
4
S
MARKING DIAGRAMS
4
Drain
1
Gate
2
Drain
3
Source
4
Drain
1
2
3
DPAK
CASE 369D
Style 2
20P06L
Y
WW
Device Code
= Year
= Work Week
12 3
Gate Drain Source
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2004
August, 2004 − Rev. 3
1
Publication Order Number:
NTD20P06L/D

1 page




NTD20P06L pdf
NTD20P06L
1000
100
VGS = −15 V
Single Pulse
TC = 25°C
100
10
1
10 ms
1
0.1
0.1
RDS(on) Limit
Thermal Limit
Package Limit
dc
1 10 100
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
350
ID = −15 A
300
250
200
150
100
50
0
25 50 75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
1
0.1
Single Pulse
0.01
1E−03
1E−02
Normalized to RqJA at Steady State (1 in Pad)
Chip 0.0175 0.0710 0.2706 0.5776 0.7086
Ambient
0.0154 F 0.0854 F 0.3074 F 1.7891 F 107.55 F
1E−01
1E+00
t, TIME (s)
Figure 13. Thermal Response
1E+01
1E+02
1E+03
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