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PDF NTE6810 Data sheet ( Hoja de datos )

Número de pieza NTE6810
Descripción Integrated Circuit 128 x 8-Bit Static Random Access Memory (SRAM)
Fabricantes NTE Electronics 
Logotipo NTE Electronics Logotipo



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NTE6810
Integrated Circuit
128 x 8–Bit Static Random Access Memory (SRAM)
Description:
The NTE6810 is a byte–orgainzed memory in a 24–Lead DIP type package designed for use in bus–
organized systems. It is fabricated with N–channel silicon–gate technology. For ease of use, this
device operates from a single power supply, has compatibility with TTL and DTL, and needs no clocks
or refreshing because of static operation.
The memory is compatible with the 6800 Microcomputer Family, providing random storage in byte
increments. Memory expansion is provided through multiple Chip Select inputs.
Features:
D Organized as 128 Bytes of 8–Bits
D Static Operation
D Bidirectional Three–State Data Input/Output
D Six Chip Select Inputs (Four Active Low, Two Active High)
D Single 5V Power Supply
D TTL Compatible
D Maximum Access Time: 450ns
Absolute Maximum Ratings:
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7V
Input Voltage, Vin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 to +7V
Operating Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° to +70°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65° to +150°C
Thermal Resistance, Junction to Ambient, RΘJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +120°C/W
Note 1. This device contains circuitry to protect the inputs against damage due to high static voltages
or electric fields; however, it is advised that normal precautions be taken to avoid application
of any voltage higher than maximum rated voltages to this high impedance circuit. Reliability
of operation is enhanced if unused inputs are tied to an appropriate logic voltage (e.g., either
VSS or VCC).

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