NTE7133 PDF даташит
Спецификация NTE7133 изготовлена «NTE Electronics» и имеет функцию, называемую «Integrated Circuit Horizontal and Vertical Deflection Controller for VGA/XGA and Autosync Monitors». |
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Детали детали
Номер произв | NTE7133 |
Описание | Integrated Circuit Horizontal and Vertical Deflection Controller for VGA/XGA and Autosync Monitors |
Производители | NTE Electronics |
логотип |
7 Pages
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NTE7133
Integrated Circuit
Horizontal and Vertical Deflection Controller
for VGA/XGA and Autosync Monitors
Description:
The NTE7133 is an integrated circuit in a 20–Lead DIP type package. This device is designed to pro-
vide an economical solution in VGA/XGA and autosync monitors by incorporating complete horizon-
tal and vertical small signal processing. VGA–dependent mode detection and setting are performed
on–chip.
Features:
D VGA Operation Fully Implemented Including Alignment–Free Vertical and E/W Amplitude
Pre–Settings
D 4th VGA Mode Easy Applicable (XGA, Super VGA)
D Autosync Operation Externally Selectable
D Low Jitter
D All Adjustments DC–Controllable
D Alignment–Free Oscillators
D Sync Separators for Video or Horizontal and Vertical TTL Sync Levels Regardless or Polarity
D Horizontal Oscillator with PLL1 for Sync and PLL2 for Flyback
D Constant Vertical and E/W Amplitude in Multi–Frequency Operation
D DC–Coupling to Vertical Power Amplifier
D Internal Supply Voltage Stabilization with Excellent Ripple Rejection to Ensure Stable Geometrical
Adjustments
Absolute Maximum Ratings:
Supply Voltage (Pin1), VP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to +16V
Voltage (Pin3, Pin7), V3, V7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to +16V
Voltage (Pin8), V8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 to +7V
Voltage (Pin5, Pin6, Pin9, Pin10, Pin13, Pin14, Pin18), Vn . . . . . . . . . . . . . . . . . . . . . . –0.5 to +6.5V
Current (Pin2), I2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10mA
Current (Pin3), I3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA
Current (Pin7), I7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Current (Pin8), I8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10mA
Electrostatic Handling for All Pins (Note 1), Vesd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±400V
Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Operating Ambient Temperatrure Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0° to +70°C
Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55° to +150°C
Thermal Resistance, Junction–to–Ambient (In Free Air), RthJA . . . . . . . . . . . . . . . . . . . . . . . . 65K/W
Note 1. Equivalent to discharging a 200pF capacitor through a 0Ω series resistor.
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Electrical Characteristics: (VP = 12V, TA = +25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min Typ Max Unit
Supply
Positive Supply Voltage (Pin1)
Supply Current
Internal Reference Voltage
VP
IP I18 = –1.05mA
I18 = –3.388mA
9.2 12.0 16.0 V
– 36 44 mA
– 40 49 mA
Internal Reference Voltage
Temperature Coefficient
Power Supply Ripple Rejection
Vref
TC
PSRR
TA = +20° to +100°C
f = 1kHz Sine Wave
6.0 6.25 6.5 V
– – ±90 10–6/K
60 75 – dB
f = 1MHz Sine Wave
25 35 – dB
Supply Voltage (Pin1) to Ensure All Internal
Reference Voltages
VP
9.2 – 16.0 V
Composite Sync Input (AC–Coupled, V10 = 5V)
Sync Amplitude of Video Input Signal (Pin9)
Vi sync
Top Sync Clamping Level
Sync on Green
– 300 –
1.1 1.28 1.5
mV
V
Slicing Level Above Top Sync Level
Allowed Source Resistance for 7% Duty Cycle
Differential Input Resistance
Charging Current of Coupling Capacitor
Vertical Sync Integration Time to Generate
Sync Pulse
RS
r9
I9
tint
Horizontal Sync Input (DC–Coupled, TTL–Compatible)
Sync on Green, RS = 50Ω
Vi sync > 200mV
During Sync
V9 > 1.5V
fH = 31kHz, I18 = –1.050mA
fH = 64kHz, I18 = –2.169mA
fH = 100kHz, I18 = –3.388mA
90
–
–
1.3
7
3.5
2.5
120 150
– 1.5
80 –
2.0 3.0
10 13
5.0 6.5
3.4 4.5
mV
kΩ
Ω
µA
µs
µs
µs
Sync Input Signal (Peak Value, Pin9)
Slicing Level
Vu sync
1.7 – –
1.2 1.4 1.6
V
V
Minimum Pulse Width
tp
Rise Time and Fall Time
tr, tf
Input Current
I9 V9 = 0.8V
V9 5.5V
Automatic Horizontal Polarity Switch (H–Sync on Pin9)
700 – – ns
10 – 500 ns
– – –200 µA
– – 10 µA
Horizontal Sync Pulse Width Related to tH
tp H/tH
(Duty Cycle for Automatic Polarity Correction)
– – 30 %
Delay Time for Changing Sync Polarity
tp
Vertical Sync Input (DC–Coupled, TTL–Compatible,,V–Sync on Pin10)
0.3 – 1.8 ms
Sync Input Signal (Peak Value, Pin10)
Slicing Level
Vi sync
1.7 – –
1.2 1.4 1.6
V
V
Input Current
Maximum Vertical Sync Pulse Width for
Automatic Vertical Polarity Switch
I10 0 < V10 < 5.5V
tp V
– – ±10 µA
– – 300 µs
Horizontal Mode Detector Output (VGA Mode)
Output Saturation Voltage LOW
(For Modes 1, 2, and 3)
V7 I7 = 6mA
– 0.275 0.33 V
Output Voltage HIGH
Load Current to Force VGA Mode–Dependent
Vertical and Parabola Amplitudes
Mode 4
I7 Modes 1, 2, and 3
–
– VP
V
2 – 6 mA
Output Current
Mode 4
– 0 – mA
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Electrical Characteristics (Cont’d): (VP = 12V, TA = +25°C unless otherwise specified)
Parameter
Symbol Test Conditions
Min Typ Max Unit
VGA/Autosync Mode Switch
Input Voltage LOW to Force Autosync Mode
Horizontal Comparator PLL1
Upper Control Voltage Limitation
Lower Control Voltage Limitation
V7
V17
0 – 50 mV
– 5.9 – V
– 5.1 – V
Control Current
Horizontal Oscillator
I17
– ±0.083I18 –
µA
Center Frequency
Deviation of Center Frequency
Temperature Coefficient
fOSC
∆fOSC
TC
R18 = 2.4kΩ (Pin18),
C19 = 10nF (Pin19)
– 31.45 – kHz
– – ±3.0 %
– +200 +300 10–6/K
Relative Holding/Catching Range
External Oscillator Current
Voltage at Reference Current Input (Pin18)
Horizontal PLL2
Upper Clamping Level of Flyback Input
Lower Clamping Level of Flyback Input
H–Flyback Slicing Level
ϕH/tH
I18
V18
V2 I2 = 6mA
I2 = –1mA
±6.0 ±6.5 ±7.3 %
–0.5 – –4.3 mA
2.35 2.5 2.65 V
– 5.5 –
– –0.75 –
– 3.0 –
V
V
V
Delay Between Middle of Sync and Middle of
H–Flyback Related to tH
Upper Control Voltage Limitation
Lower Control Voltage Limitation
td/tH
V20
– 3.0 – %
– 6.2 – V
– 4.8 – V
Control Current
PLL2 Control range Related to tH
Horizontal Output (Open–Collector)
I20
∆t/tH
– ±0.083I18 –
30 –
–
µA
%
Output Voltage LOW
V3 I3 = 20mA
– – 0.3 V
I3 = 60mA
– – 0.8 V
tH Duty Cycle
tp/tH 42 45 48 %
Threshold to Activate Too Low Supply Voltage
VP Horizontal Output OFF –
5.6
–V
Protection
Threshold to Activate Too Low Supply Voltage
Protection
Horizontal Output ON
–
5.8
–V
Jitter of Horizontal Output
∆tH f = 31kHz
f = 64kHz
– – 3.5 ns
– – 1.9 ns
f = 100kHz
– – 1.2 ns
Horizontal Clamping/Blanking Generator Output
Output Voltage LOW
Blanking Output Voltage
V8
Internal V Blanking
– – 0.9 V
1.6 1.9 2.2 V
Clamping Output Voltage
H–Sync on Pin9
5.15 5.4 5.65 V
Internal Sink Current for All Output Levels
I8 H and V Scanning
2.3
External Load Current –
2.9 3.5 mA
– –3.0 mA
Clamping Pulse Start
Clamping Pulse Width
Steepness of Rise and Fall Times
t8
tclp
S
With End of H–Sync
0.8 1.0 1.2
– 60 75
µs
ns/V
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