(PDF) N74F113N Datasheet - Dual J-K negative edge-triggered flip-flops without reset

Número de pieza	N74F113N
Descripción	Dual J-K negative edge-triggered flip-flops without reset
Fabricantes	Philips
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No Preview Available ! INTEGRATED CIRCUITS 74F113 Dual J-K negative edge-triggered flip-flops without reset Product specification IC15 Data Handbook 1991 Feb 14 Philips Semiconductors 1 page Philips Semiconductors Dual J-K negative edge-triggered flip-flops without reset Product specification 74F113 AC WAVEFORMS For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance. Kn Jn Jn, Kn CPn VM Jn VM tsu(L) VM th(L) = 0 tw(L) VM Kn VM tsu(H) 1/fmax VM th(H) = 0 VM tPLH tw(H) tPHL Qn VM VM tPHL tPLH Qn VM VM Waveform 1. SF00144 Propagation Delay for Data to Output, Data Setup Time and Hold Times, and Clock Width, and Maximum Clock Frequency Jn, Kn SDn VM tw(L) VM trec CPn VM tPLH Qn VM tPHL Qn VM SF00145 Waveform 2. Propagation Delay for Set to Output, Set Pulse Width, and Recovery Time for Set to Clock 1996 Mar 14 5 5 Page

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PDF N74F113N Data sheet ( Hoja de datos )