N74F280BD PDF даташит
Спецификация N74F280BD изготовлена «Philips» и имеет функцию, называемую «9-bit odd/even parity generator/checker». |
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Детали детали
Номер произв | N74F280BD |
Описание | 9-bit odd/even parity generator/checker |
Производители | Philips |
логотип |
8 Pages
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INTEGRATED CIRCUITS
74F280B
9-bit odd/even parity generator/checker
Product specification
IC15 Data Handbook
1996 Mar 12
Philips
Semiconductors
No Preview Available ! |
Philips Semiconductors
9-bit odd/even parity generator/checker
Product specification
74F280B
FEATURES
• High-impedance NPN base inputs for reduced loading
(20µA in Low and High states)
• Buffered inputs — one normalized load
• Word length easily expanded by cascading
• Industrial temperature range available (–40°C to +85°C)
DESCRIPTION
The 74F280B is a 9-bit Parity Generator or Checker commonly used
to detect errors in high speed data transmission or data retrieval
systems. Both Even (∑E) and Odd (∑O) parity outputs are available
for generating or checking even or odd parity on up to 9 bits.
The Even (∑E) parity output is High when an even number of Data
inputs (I0 - I8) are High. The Odd (∑O) parity output is High when an
odd number of Data inputs are High.
Expansion to larger word sizes is accomplished by tying the Even
(∑E) outputs of up to nine parallel devices to the data inputs of the
final stage. This expansion scheme allows an 81-bit data word to be
checked in less than 20ns.
ORDERING INFORMATION
DESCRIPTION
14-pin plastic DIP
14-pin plastic SO
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
N74F280BN
N74F280BD
PIN CONFIGURATION
I6 1
I7 2
NC 3
I8 4
ΣE 5
ΣO 6
GND 7
14 VCC
13 I5
12 I4
11 I3
10 I2
9 I1
8 I0
SF00849
TYPE
74F280B
TYPICAL
PROPAGATION
DELAY
5.5ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
26mA
INDUSTRIAL RANGE
VCC = 5V ±10%,
Tamb = –40°C to +85°C
I74F280BN
I74F280BD
PKG. DWG. #
SOT27-1
SOT108-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
I0 - I8
Data inputs
1.0/0.033
∑E, ∑O
Parity outputs
50/33
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
IEC/IEEE SYMBOL
LOAD VALUE
HIGH/LOW
20µA/20µA
1.0mA/20mA
8 9 10 11 12 13 1 2 4
I0 I1 I2 I3 I4 I5 I6 I7 I8
ΣE ΣO
56
SF00845
8 2K
9
10
11 ΣE 5
12
13
1 ΣO 6
2
4
VCC=Pin 14
GND=Pin 7
SF00846
1996 Mar 12
2 853-0363 16555
No Preview Available ! |
Philips Semiconductors
9-bit odd/even parity generator/checker
LOGIC DIAGRAM
8
I0
9
I1
10
I2
11
I3
12
I4
13
I5
VCC=Pin 14
GND=Pin 7
1
I6
2
I7
4
I8
FUNCTION TABLE
INPUTS
Number of High Data Inputs (I0 - I8)
Even — 0, 2, 4, 6, 8
Odd — 1, 3, 5, 7, 9
H = High voltage level
L = Low voltage level
OUTPUTS
∑E ∑O
HL
LH
Product specification
74F280B
5
ΣE
6
ΣO
SF00847
1996 Mar 12
3
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Номер в каталоге | Описание | Производители |
N74F280BD | 9-bit odd/even parity generator/checker | Philips |
N74F280BN | 9-bit odd/even parity generator/checker | Philips |
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