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N74F382N PDF даташит

Спецификация N74F382N изготовлена ​​​​«Philips» и имеет функцию, называемую «Arithmetic Logic Unit».

Детали детали

Номер произв N74F382N
Описание Arithmetic Logic Unit
Производители Philips
логотип Philips логотип 

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N74F382N Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
74F382
Arithmetic Logic Unit
Product specification
IC15 Data Handbook
Philips
Semiconductors
1990 Jul 12









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N74F382N Даташит, Описание, Даташиты
Philips Semiconductors
Arithmetic logic unit
Product specification
74F382
FEATURES
Performs six arithmetic and logic functions
Selectable Low (clear) and High (preset) functions
Low-input loading minimizes drive requirements
Carry output for ripple expansion
Overflow output for Two’s Complement arithmetic
DESCRIPTION
The 74F382 performs three arithmetic and three logic operations on
two 4-bit words, A and B. Two additional Select (S0–S2) input codes
force the Function outputs Low or High. An overflow output is
provided for convenience in Two’s Complement arithmetic.
A carry output is provided for ripple expansion. For high-speed
expansion using a carry look-ahead generator, refer to the 74F381
data sheet.
Signals applied to the Select inputs, S0–S2, determine the mode of
operation, as indicated in the Function Select Table. An extensive
listing of input and output levels is shown in the Function Table. The
circuit performs the arithmetic functions for either active-HIgh or
active-Low operands, with output levels in the same convention. In
the subtract operating modes, it is necessary to force a carry (High
for active-HIgh operands, Low for active-Low operands) into the Cn
input of the least significant package. Ripple expansion is illustrated
in Figure 1. The overflow output OVR is the Exclusive-OR of Cn+3
and Cn+4; a High signal on OVR indicates overflow in Two’s
complement operation (See Table 2 for Two’s complement
arithmetic). Typical delays for Figure 1 are given in Table 1. When
the 74F382 is cascaded to handle word lengths longer than 4 bits,
only the most significant overflow (OVR) output is used.
PIN CONFIGURATION
A1 1
B1 2
A0 3
B0 4
S0 5
S1 6
S2 7
F0 8
F1 9
GND 10
20 VCC
19 A2
18 B2
17 A3
16 B3
15 Cn
14 Cn+4
13 OVR
12 F3
11 F2
SF00935
TYPE
74F382
TYPICAL
PROPAGATION
DELAY
7.0ns
TYPICAL SUPPLY
CURRENT (TOTAL)
54mA
ORDERING INFORMATION
DESCRIPTION
20-pin plastic DIP
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
N74F382N
20-pin plastic SO
N74F382D
PKG DWG #
SOT146-1
SOT163-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
A0 – A3
A operand inputs
B0 – B3
B operand inputs
S0 – S2
Function select inputs
Cn Carry input
Cn+4
Carry output
OVR
Overflow output
F0–F3
Outputs
NOTE:
One (1.0) FAST unit load is defined as 20µA in the High state and 0.6mA in the Low state.
74F (U.L.)
HIGH/LOW
1.0/4.0
1.0/4.0
1.0/1.0
1.0/5.0
50/33
50/33
50/33
LOAD VALUE
HIGH/LOW
20µA/2.4mA
20µA/2.4mA
20µA/0.6mA
20µA/3.0mA
1.0mA/20mA
1.0mA/20mA
1.0mA/20mA
1990 Jul 12
2 853–0419 99966









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N74F382N Даташит, Описание, Даташиты
Philips Semiconductors
Arithmetic logic unit
Product specification
74F382
LOGIC SYMBOL
3 4 1 2 19 18 17 16
A0 B0 A1 B1 A2 B2 A3 B3
15 Cn
5 S0
6 S1
OVR
Cn+4
13
14
7 S2
F0 F1 F2 F3
VCC = Pin 20
GND = Pin 10
8 9 11 12
SF00936
IEC/IEEE SYMBOL
5 0 ALU
6 M0
7
72
(1/2) Bl
15 3 Cl
3P
4 Q [1]
1P
2
[2]
Q
19
18
P [4]
Q BO/CO
17
=1
P BO/CO
16 Q [8] (1/2)BO
3CO
8
9
11
13
14
12
SF00937
1990 Jul 12
3










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