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PDF N74F539N Data sheet ( Hoja de datos )

Número de pieza N74F539N
Descripción Dual 1-of-4 decoder 3-State
Fabricantes Philips 
Logotipo Philips Logotipo



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Philips Semiconductors
Dual 1-of-4 decoder (3-State)
Product specification
74F539
DESCRIPTION
The 74F539 contains two independent decoders. Each accepts two
address (A0 - A1) input signals and decodes them to select one of
four mutually exclusive outputs. A Polarity control (P) input
determines whether the outputs are active Low (P=H) or active High
(P=L). An active-Low Enable (E) is available for data demultiplexing.
Data is routed to the selected output in non-inverted or inverted form
in the active-Low mode or inverted form in the active-High mode. A
High signal on the Output Enable (OEn) input forces the 3-State
outputs to the high impedance state.
TYPE
TYPICAL
PROPAGATION DELAY
74F539
7.5ns
TYPICAL SUPPLY
CURRENT
(TOTAL)
40mA
PIN CONFIGURATION
Q2b 1
Q1b 2
Q0b 3
Pb 4
OEb 5
A0a 6
A1a 7
Q3a 8
Q2a 9
GND 10
20 VCC
19 Q3b
18 A1b
17 A0b
16 Eb
15 Ea
14 OEa
13 Pa
12 Q0a
11 Q1a
ORDERING INFORMATION
DESCRIPTION
20-Pin Plastic DIP
COMMERCIAL RANGE
VCC = 5V ±10%, Tamb = 0°C to +70°C
N74F539N
20-Pin Plastic SOL
N74F539D
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
A0a - A1a
Decoder A Address inputs
1.0/1.0
A0b - A1b
Decoder B Address inputs
1.0/1.0
Ea, Eb
Enable inputs (active Low)
1.0/1.0
OEa, OEb
Output Enable inputs (active Low)
1.0/1.0
Pa, Pb
Polarity control inputs
1.0/1.0
Q0a–Q3a
Decoder A Data outputs
150/40
Q0b–Q3b
Decoder A Data outputs
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
150/40
LOGIC SYMBOL
6 7 17 18
13 Pa
15 Ea
A0a A1a A0b A1b
14 OEa
4 Pb
16 Eb
5 OEb
Q0a Q1a Q2a Q3a Q0b Q1b Q2b Q3b
VCC = Pin 20
GND = Pin 10
12
11
9
8
3
2
1 19
SF01014
LOGIC SYMBOL (IEEE/IEC)
DMUX
4 N4
5 EN
17
18
0
1
G
0
3
16
13
14
6
7
15
0,4
1,4
2,4
3,4
SF01013
LOAD VALUE
HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
3.0mA/24mA
3.0mA/24mA
3
2
1
19
12
11
9
8
SF01015
1990 Feb 23
1 853–1274 98905

1 page




N74F539N pdf
Philips Semiconductors
Dual 1-of-4 decoder (3-State)
Product specification
74F539
TEST CIRCUIT AND WAVEFORM
VCC
PULSE
GENERATOR
VIN
VOUT
D.U.T.
RL
RT CL RL
Test Circuit for 3-State Outputs
SWITCH POSITION
TEST
tPLZ
tPZL
All other
SWITCH
closed
closed
open
7.0V
90%
NEGATIVE
PULSE
POSITIVE
PULSE
10%
tw
VM
10%
tTHL (tf )
VM
10%
tTLH (tr )
tTLH (tr )
90%
VM
tw
tTHL (tf )
90%
VM
Input Pulse Definition
90%
AMP (V)
0V
AMP (V)
10%
0V
DEFINITIONS:
RL = Load resistor;
see AC electrical characteristics for value.
CL = Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
INPUT PULSE REQUIREMENTS
family
amplitude VM rep. rate
tw tTLH
74F 3.0V 1.5V 1MHz 500ns 2.5ns
tTHL
2.5ns
SF00777
1990 Feb 23
5

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