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PDF N74F835D Data sheet ( Hoja de datos )

Número de pieza N74F835D
Descripción 8-bit shift register with 2:1 mux-in / latched B inputs / and serial out
Fabricantes Philips 
Logotipo Philips Logotipo



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Philips Semiconductors
8-bit shift register with 2:1 mux-in,
latched “B” inputs, and serial out
Product specification
74F835
FEATURES
Specifically designed for Video applications
Combines the 74F373, two 74F157s, and the 74F166 functions in
one package
Interleaved loading with 2:1 mux
Dual 8-bit parallel inputs
Transparent latch on all “B” inputs
Guaranteed serial shift frequency to 100MHz
Expandable to 16-bits or more with serial input
DESCRIPTION
The 74F835 is a high speed 8-bit parallel/serial-in, serial-out shift
register whose parallel inputs have been connected to an internal
octal two-to-one multiplexer with all the “B” inputs connected to an
octal latch.
This 24-pin part is specifically designed for video bit shifting, where
interleaved loading is desired and parts count is critical. It is useful in
any design where a 2:1 mux input with a transparent latch is
needed.
TYPE
74F835
TYPICAL fMAX
150MHz
TYPICAL
SUPPLY CURRENT
(TOTAL)
45mA
PIN CONFIGURATION
PE 1
CP 2
D4A 3
D4B 4
D5A 5
D5B 6
D6A 7
D6B 8
D7A 9
D7B 10
Q7 11
GND 12
24 VCC
23 D3B
22 D3A
21 D2B
20 D2A
19 D1B
18 D1A
17 D0B
16 D0A
15 DS
14 SA/B
13 LE
SF01355
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
VCC = 5V ±10%,
Tamb = 0°C to +70°C
24-pin plastic
Slim DIP (300 mil)
N74F835N
24-pin plastic SOL
N74F835D
PACKAGE
DRAWING
NUMBER
SOT222-1
SOT137-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F (U.L.) HIGH/LOW
D0A – D7A
Parallel data inputs
1.0/1.0
D0B – D7B
Latched Parallel data inputs
1.0/1.0
DS Serial data input
1.0/1.0
CP Shift Register Clock input (active rising edge)
1.0/1.0
SA/B
Mux Select
1.0/1.0
LE Latch Enable input (for B inputs)
1.0/1.0
PE Parallel Enable input
1.0/1.0
Q7 Output
50/33
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE HIGH/LOW
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
20µA/0.6mA
1.0mA/20mA
1990 Jan 08
1 853–0615 99490

1 page




N74F835D pdf
Philips Semiconductors
8-bit shift register with 2:1 mux-in,
latched “B” inputs, and serial out
Product specification
74F835
AC ELECTRICAL CHARACTERISTICS
SYMBOL
PARAMETER
fMAX
tPLH
tPHL
tPLH
tPHL
Maximum clock frequency
Propagation delay
CP to Q7 (Load)
Propagation delay
CP to Q7 (Shift)
AC SETUP REQUIREMENTS
SYMBOL
PARAMETER
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
tw(H)
tw(L)
tw(H)
Setup time
DnA or DnB to CP
Hold time
DnA or DnB to CP
Setup time
DS to CP
Hold time
DS to CP
Setup time
PE to CP
Hold time
PE to CP
Setup time
DnB to LE
Hold time
DnB to LE
Setup time
SA/B to CP
Hold time
SA/B to CP
clock pulse width,
High or Low
Latch Enable pulse width,
High
TEST
CONDITION
Waveform 1
Waveform 1
Waveform 1
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500
MIN TYP MAX
MIN
MAX
130 150
100
5.0 7.0 9.5
5.0 7.0 9.5
5.0
5.0
10.0
10.0
5.0 7.0 9.5
5.0 7.0 9.5
5.0
5.0
10.0
10.0
UNIT
MHz
ns
ns
TEST
CONDITION
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 1
Waveform 1
LIMITS
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500
MIN MAX
3.5 3.5
3.5 3.5
1.0 1.5
1.0 1.5
1.0 1.5
1.0 1.5
2.0 2.5
2.0 2.5
3.5 4.0
3.5 4.0
0.0 0.0
0.0 0.0
0.0 0.0
0.0 0.0
3.0 4.0
3.0 4.0
4.5 5.0
4.5 5.0
0.0 0.0
0.0 0.0
4.5 5.5
4.5 5.0
4.5 5.0
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1990 Jan 08
5

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