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PDF NBSG16M Data sheet ( Hoja de datos )

Número de pieza NBSG16M
Descripción 2.5V/3.3VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer
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NBSG16M
2.5V/3.3V Multilevel Input
to CML Clock/Data
Receiver/Driver/Translator
Buffer
The NBSG16M is a differential current mode logic (CML)
receiver/driver/translator buffer. The device is functionally equivalent
to the EP16, LVEP16, or SG16 devices with CML output structure and
lower EMI capabilities.
Inputs incorporate internal 50 W termination resistors and accept
LVNECL (Negative ECL), LVPECL (Positive ECL), LVTTL,
LVCMOS, CML, or LVDS. The CML output structure contains
internal 50 W source termination resistor to VCC. The device
generates 400 mV output amplitude with 50 W receiver resistor to
VCC.
The VBB pin is internally generated voltage supply available to this
device only. For all single−ended input conditions, the unused
complementary differential input is connected to VBB as a switching
reference voltage. VBB may also rebias AC coupled inputs. When
used, decouple VBB via a 0.01 mF capacitor and limit current sourcing
or sinking to 0.5 mA. When not used, VBB output should be left open.
Maximum Input Clock Frequency > 10 GHz Typical
Maximum Input Data Rate > 10 Gb/s Typical
120 ps Typical Propagation Delay
35 ps Typical Rise and Fall Times
Positive CML Output with Operating Range: VCC = 2.375 V to
3.465 V with VEE = 0 V
Negative CML Output with RSNECL or NECL Inputs with
Operating Range: VCC = 0 V with VEE = −2.375 V to −3.465 V
CML Output Level; 400 mV Peak−to−Peak Output with
50 W Receiver Resistor to VCC
50 W Internal Input and Output Termination Resistors
Compatible with Existing 2.5 V/3.3 V LVEP, EP, LVEL
and SG Devices
VBB Reference Voltage Output
http://onsemi.com
MARKING
DIAGRAM*
QFN−16
MN SUFFIX
CASE 485G
SG
16M
ALYW
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package
Shipping
NBSG16MMN
3x3 mm
QFN−16
123 Units / Rail
NBSG16MMNR2
3x3 mm 3000/Tape & Reel
QFN−16
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
April, 2004 − Rev. 3
1
Publication Order Number:
NBSG16M/D

1 page




NBSG16M pdf
NBSG16M
Table 5. DC CHARACTERISTICS, POSITIVE CML OUTPUT VCC = 2.5 V; VEE = 0 V (Note 6)
−40°C
25°C
85°C
Symbol
Characteristic
ICC Positive Power Supply Current
VOH Output HIGH Voltage (Note 7)
Min Typ
37 43
VCC − VCC
40 10
Max
51
VCC
Min Typ
37 43
VCC − VCC
40 10
Max
51
VCC
Min
37
VCC
40
Typ
43
VCC
10
Max
51
VCC
Unit
mA
mV
VOL Output LOW Voltage (Note 6)
VCC − VCC
400 330
VCC − VCC
400 330
VCC − VCC− mV
400 330
VIH Input HIGH Voltage
(Single−Ended) (Note 8)
VEE + VCC − VCC VEE + VCC − VCC VEE+ VCC − VCC
1.275 1.0*
1.275 1.0*
1..275 1.0*
V
VIL Input LOW Voltage
(Single−Ended) (Note 8)
VEE VCC − VIH− VEE VCC − VIH
1.4* 0.150
1.4* 0.150
VEE VCC − VIH
1.4* 0.150
V
VBB
VIHCMR
ECL Reference Voltage Output
Input HIGH Voltage Common Mode
Range (Note 8)
(Differential Configuration)
1075 1170 1265 1075 1170 1265
1.2 2.5 1.2 2.5
1075
1.2
1170 1265
2.5
mV
V
RTIN
RTOUT
Internal Input Termination Resistor
Internal Output Termination
Resistor
45 50 55 45 50 55 45 50 55 W
45 50 55 45 50 55 45 50 55 W
IIH Input HIGH Current (@ VIH)
60 100
60 100
60 100 mA
IIL Input LOW Current (@ VIL)
25 50
25 50
25 50 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification
limit values are applied individually under normal operating conditions and not valid simultaneously.
6. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to −0.965 V.
7. All loading with 50 W to VCC.
8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differen-
tial input signal.
*Typicals used for testing purposes.
http://onsemi.com
5

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NBSG16M arduino
NBSG16M
PACKAGE DIMENSIONS
−X−
A
M
QFN−16
MN SUFFIX
CASE 485G−01
ISSUE A
−Y−
0.25 (0.010) T
0.25 (0.010) T
B
N
0.08 (0.003) T
R
L
J
E
5
K
H
G
8
C
−T−
SEATING
PLANE
49
F
1 12
16
D NOTE 3
0.10 (0.004) M T X Y
13
P
0.575
0.022
SOLDERING FOOTPRINT
3.25
0.128
0.30
0.012
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
MILLIMETERS
DIM MIN MAX
A 3.00 BSC
B 3.00 BSC
C 0.80 1.00
D 0.23 0.28
E 1.75 1.85
F 1.75 1.85
G 0.50 BSC
H 0.875 0.925
J 0.20 REF
K 0.00 0.05
L 0.35 0.45
M 1.50 BSC
N 1.50 BSC
P 0.875 0.925
R 0.60 0.80
INCHES
MIN MAX
0.118 BSC
0.118 BSC
0.031 0.039
0.009 0.011
0.069 0.073
0.069 0.073
0.020 BSC
0.034 0.036
0.008 REF
0.000 0.002
0.014 0.018
0.059 BSC
0.059 BSC
0.034 0.036
0.024 0.031
3.25
0.128
1.50
0.059
0.30
0.50 0.012
ǒ Ǔ0.02
SCALE 10:1
mm
inches
QFN−16, 3x3 mm,
EP 2x2 mm
http://onsemi.com
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