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NC7SV58P6X PDF даташит

Спецификация NC7SV58P6X изготовлена ​​​​«Fairchild» и имеет функцию, называемую «TinyLogic. ULP-A Universal Configurable 2-Input Logic Gates».

Детали детали

Номер произв NC7SV58P6X
Описание TinyLogic. ULP-A Universal Configurable 2-Input Logic Gates
Производители Fairchild
логотип Fairchild логотип 

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NC7SV58P6X Даташит, Описание, Даташиты
June 2002
Revised January 2003
NC7SV57 NC7SV58
TinyLogicULP-A Universal Configurable
2-Input Logic Gates
General Description
The NC7SV57 and NC7SV58 are universal configurable
2-input logic gates from Fairchild’s Ultra Low Power
(ULP-A) Series of TinyLogic. ULP-A is ideal for applica-
tions that require extreme high speed, high drive and low
power. This product is designed for a wide low voltage
operating range (0.9V to 3.6V VCC) and applications that
require more drive and speed than the TinyLogic ULP
series, but still offer best in class low power operation.
Each device is capable of being configured for 1 of 5
unique 2-input logic functions. Any possible 2-input combi-
natorial logic function can be implemented as shown in the
Function Selection Table. Device functionality is selected
by how the device is wired at the board level. Figure 1
through Figure 10 illustrate how to connect the NC7SV57
and NC7SV58 respectively for the desired logic function.
All inputs have been implemented with hysteresis.
The NC7SV57 and NC7SV58 are uniquely designed for
optimized power and speed, and are fabricated with an
advanced CMOS technology to achieve high-speed opera-
tion while maintaining low CMOS power dissipation.
Features
s 0.9V to 3.6V VCC supply operation
s 3.6V overvoltage tolerant I/O’s at VCC from 0.9V to 3.6V
s Extremely High Speed tPD
2.5 ns typ for 2.7V to 3.6V VCC
3.1 ns typ for 2.3V to 2.7V VCC
4.0 ns typ for 1.65V to 1.95V VCC
6.0 ns typ for 1.4V to 1.6V VCC
8.0 ns typ for 1.1V to 1.3V VCC
23.0 ns typ for 0.9V VCC
s Power-Off high impedance inputs and outputs
s High Static Drive (IOH/IOL)
±24 mA @ 3.00V VCC
±18 mA @ 2.30V VCC
±6 mA @ 1.65V VCC
±4 mA @ 1.4V VCC
±2 mA @ 1.1V VCC
±0.1 mA @ 0.9V VCC
s Uses patented Quiet Seriesnoise/EMI reduction
circuitry
s Ultra small MicroPakleadfree package
s Ultra low Dynamic Power
Ordering Code:
Order Number
NC7SV57P6X
NC7SV57L6X
NC7SV58P6X
NC7SV58L6X
Package
Number
MAA06A
MAC06A
MAA06A
MAC06A
Product Code
Top Mark
Package Description
V57 6-Lead SC70, EIAJ SC88, 1.25mm Wide
H3 6-Lead MicroPak, 1.0mm Wide
V58 6-Lead SC70, EIAJ SC88, 1.25mm Wide
H4 6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
5k Units on Tape and Reel
3k Units on Tape and Reel
5k Units on Tape and Reel
Battery Life vs. VCC Supply Voltage
TinyLogic ULP and ULP-A with up to 50% less power consumption can
extend your battery life significantly.
Battery Life = (Vbattery *Ibattery*.9)/(Pdevice)/24hrs/day
Where, Pdevice = (ICC * VCC) + (CPD + CL) * VCC2 * f
Assumes ideal 3.6V Lithium Ion battery with current rating of 900mAH and
derated 90% and device frequency at 10MHz, with CL = 15 pF load
TinyLogic, MicroPak, and Quiet Seriesare trademarks of Fairchild Semiconductor Corporation.
© 2003 Fairchild Semiconductor Corporation DS500671
www.fairchildsemi.com









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NC7SV58P6X Даташит, Описание, Даташиты
Pin Descriptions
Connection Diagrams
Pin Name
I0, I1, I2
Y
Description
Data Inputs
Output
Pin Assignments for SC70
Function Table
Inputs
I2 I1 I0
LLL
L LH
LHL
L HH
HL L
HLH
HH L
HHH
H = HIGH Logic Level
L = LOW Logic Level
NC7SV57
NC7SV58
Y = (I0)(I2)+(I1)(I2) Y = (I0)(I2)+(I1)(I2)
HL
LH
HL
LH
LH
LH
HL
HL
(Top View)
Pin One Orientation Diagram
Function Selection Table
2-Input Logic Function
2-Input AND
2-Input AND
with inverted input
2-Input AND
with both inputs inverted
2-Input NAND
2-Input NAND
with inverted input
2-Input NAND
with both inputs inverted
2-Input OR
2-Input OR
with inverted input
2-Input OR
with both inputs inverted
2-Input NOR
2-Input NOR
with inverted input
2-Input NOR
with both inputs inverted
2-Input XOR
2-Input XNOR
Device
Selection
NC7SV57
NC7SV58
NC7SV57
NC7SV58
NC7SV57
NC7SV58
NC7SV58
NC7SV57
NC7SV58
NC7SV57
NC7SV58
NC7SV57
NC7SV58
NC7SV57
Connection
Configuration
Figure 1
Figures 7, 8
Figure 4
Figure 6
Figures 2, 3
Figure 9
Figure 9
Figures 2, 3
Figure 6
Figure 4
Figures 7, 8
Figure 1
Figure 10
Figure 5
AAA represents Product Code Top Mark - see ordering code
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
Pad Assignments for MicroPak
(Top Thru View)
www.fairchildsemi.com
2









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NC7SV58P6X Даташит, Описание, Даташиты
Logic Configurations NC7SV57
Figure 1 through Figure 5 show the logical functions that can be implemented using the NC7SV57. The diagrams show the
DeMorgans equivalent logic duals for a given 2-input function. Next to the logical implementation is the board level physical
implementation of how the pins of the function should be connected.
FIGURE 1. 2-Input AND Gate
FIGURE 2. 2-Input NAND with Inverted A Input
FIGURE 3. 2-Input NAND with Inverted B Input
FIGURE 4. 2-Input NOR Gate
FIGURE 5. 2-Input XNOR Gate
3 www.fairchildsemi.com










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Номер в каталогеОписаниеПроизводители
NC7SV58P6XTinyLogic. ULP-A Universal Configurable 2-Input Logic GatesFairchild
Fairchild

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