NC7SZ18P6X PDF даташит
Спецификация NC7SZ18P6X изготовлена «Fairchild» и имеет функцию, называемую «TinyLogic UHS 1-of-2 Non-Inverting Demultiplexer». |
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Детали детали
Номер произв | NC7SZ18P6X |
Описание | TinyLogic UHS 1-of-2 Non-Inverting Demultiplexer |
Производители | Fairchild |
логотип |
8 Pages
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September 1999
Revised May 2003
NC7SZ18
TinyLogic UHS 1-of-2 Non-Inverting Demultiplexer
with 3-STATE Deselected Output
General Description
The NC7SZ18 is a 1-of-2 non-inverting demultiplexer. The
device will buffer the data on the A pin and pass to either
output Y0 or Y1 dependent on whether state of the select
pin (S) is LOW or HIGH respectively. The deselected out-
put will be placed into a high impedance state. The device
is fabricated with advanced CMOS technology to achieve
ultra high speed with high output drive while maintaining
low static power dissipation over a broad VCC operating
range. The device is specified to operate over the 1.65V to
5.5V VCC operating range. The inputs and outputs are high
impedance when VCC is 0V. Inputs tolerate voltages up to
5.5V independent of VCC operating range.
Features
s Space saving SC70 6-lead surface mount package
s Ultra small MicroPak leadless package
s High Impedance output when deselected
s Ultra High Speed: tPD 2.5 ns Typ into 50 pF at 5V VCC
s Broad VCC Operating Range; 1.65V to 5.5V
s Power down high impedance inputs/outputs
s Overvoltage tolerant inputs facilitate 5V to 3V translation
s Patented noise/EMI reduction circuitry implemented
Ordering Code:
Order
Number
NC7SZ18P6X
NC7SZ18L6X
Package
Number
MAA06A
MAC06A
Product Code
Top Mark
Package Description
Z18 6-Lead SC70, EIAJ SC88, 1.25mm Wide
D5 6-Lead MicroPak, 1.0mm Wide
Supplied As
3k Units on Tape and Reel
5k Units on Tape and Reel
Pin Descriptions
Pin Names
A
S
Y0, Y1
Description
Data Input
Demultiplexer Select
Outputs
Function Table
Input
S
L
L
H
H
H = HIGH Logic Level
L = LOW Logic Level
Z = 3-STATE
A
L
H
L
H
Output
Y0 Y1
LZ
HZ
ZL
ZH
Connection Diagrams
Pin Assignments for SC70
Pin One Orientation Diagram
AAA = Product Code Top Mark - see ordering code
Note: Orientation of Top Mark determines Pin One location. Read the top
product code mark left to right, Pin One is the lower left pin (see diagram).
Pad Assignments for MicroPak
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.
MicroPak is a trademark of Fairchild Semiconductor Corporation.
© 2003 Fairchild Semiconductor Corporation DS500322
(Top Thru View)
www.fairchildsemi.com
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Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Voltage (VIN)
DC Output Voltage (VOUT)
DC Input Diode Current (IIK)
@ VIN ≤ −0.5V
DC Output Diode Current (IOK)
@ VIN ≤ −0.5V
DC Output Current (IOUT)
DC VCC or Ground Current (ICC/IGND)
Storage Temperature Range (TSTG)
Junction Temperature under Bias (TJ)
Junction Lead Temperature (TL)
(Soldering, 10 seconds)
Power Dissipation (PD) @ +85°C
−0.5V to +7.0V
−0.5V to +7.0V
−0.5V to +7.0V
−50 mA
−50 mA
±50 mA
±100 mA
−65°C to +150°C
150°C
260°C
180 mW
Recommended Operating
Conditions
Supply Voltage Operating (VCC)
1.65V to 5.5V
Supply Voltage Data Retention (VCC)
1.5V to 5.5V
Input Voltage (VIN)
0V to 5.5V
Output Voltage (VOUT)
0V to VCC
Operating Temperature (TA)
−40°C to +85°C
Input Rise and Fall Time (tr, tf)
VCC @ 1.8V ± 0.15V, 2.5V ± 0.2V
0 ns/V to 20 ns/V
VCC @ 3.3V ± 0.3V
0 ns/V to 10 ns/V
VCC @ 5.0V ± 0.5V
0 ns/V to 5 ns/V
Thermal Resistance (θJA)
350°C/W
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside datasheet specifi-
cations.
DC Electrical Characteristics
Symbol
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C
Units
(V) Min Typ Max Min Max
Conditions
VIH HIGH Level
Input Voltage
VIL LOW Level
Input Voltage
VOH HIGH Level
Output Voltage
1.65 − 1.95
2.3 − 5.5
1.65 − 1.95
2.3 − 5.5
1.65
2.3
3.0
0.75 VCC
0.7 VCC
1.55
2.2
2.9
1.65
2.3
3.0
0.25 VCC
0.3 VCC
0.75 VCC
0.7 VCC
1.55
2.2
2.9
0.25 VCC
0.3 VCC
V
V
IOH = −100 µA
4.5 4.4 4.5
4.4
VOL LOW Level
Output Voltage
1.65
2.3
3.0
3.0
4.5
1.65
1.29
1.9
2.4
2.3
3.8
1.52
2.15
2.80
3.68
4.20
0.0
0.10
1.29
1.9
2.4
2.3
3.8
0.10
V VIN = VIH IOH = −4 mA
IOH = −8 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
2.3
0.0 0.10
0.10
3.0
0.0 0.10
0.10
IOL = 100 µA
4.5
0.0 0.10
0.10
1.65
2.3
3.0
3.0
4.5
IIN Input Leakage Current 0 to 5.5
IOZ 3-STATE Output Leakage 1.65 to 5.5V
IOFF
Power Off Leakage Current
0.0
ICC Quiescent Supply Current 1.8 to 5.5
0.08
0.10
0.15
0.22
0.22
0.24
0.3
0.4
0.55
0.55
±0.1
±0.5
1
1
0.24
0.3
0.4
0.55
0.55
±1
±5
10
10
V VIN = VIL IOL = 4 mA
IOL = 8 mA
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
µA VIN = 5.5V, GND
µA VIN = VIL or VIH
0 < VOUT ≤ 5.5V
µA VIN or VOUT = 5.5V
µA VIN = 5.5V, GND
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AC Electrical Characteristics
Symbol
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C
Figure
Units Conditions
(V) Min Typ Max Min Max
Number
tPLH Propagation Delay
tPHL
A to Y0 or Y1
1.8 ± 0.15 2.0 6.3 10.1 2.0 10.5
CL = 15 pF,
2.5 ± 0.2
1.0
3.6
5.7
1.0
6.0 ns RD = 1 MΩ
3.3 ± 0.3
0.8
2.7
4.0
0.8
4.3
S1 = OPEN
Figures
1, 3
5.0 ± 0.5
0.5
2.0
3.1
0.5
3.3
tPLH Propagation Delay
tPHL
A to Y0 or Y1
3.3 ± 0.3
1.2
3.4
4.9
1.2
5.4
CL = 50 pF,
5.0 ± 0.5
0.8
2.5
3.9
0.8
4.2 ns RL = 500Ω
Figures
1, 3
S1 = OPEN
tPZL Output Enable Time
1.8 ± 0.15 3.0
6.9 12.0 3.0
12.5
CL = 50 pF
tPZH
2.5 ± 0.2
1.8
4.2
6.8
1.8
7.3
RD, RU = 500Ω
3.3 ± 0.3
1.2
3.2
5.0
1.2
5.5
ns
S1 = GND for tPZH
Figures
1, 3
5.0 ± 0.5
0.8
2.5
4.0
0.8
4.3
S1 = VIN for tPZL
VI = 2 x VCC
tPLZ Output Disable Time 1.8 ± 0.15 2.5 6.0 10.0 2.5 10.5
CL = 50 pF
tPHZ
2.5 ± 0.2
1.5
4.0
6.8
1.5
7.1
RD, RU = 500Ω
3.3 ± 0.3
0.8
2.9
4.9
0.8
5.3
ns
S1 = GND for tPHZ
Figures
1, 3
5.0 ± 0.5
0.3
1.8
3.5
0.3
3.7
S1 = VIN for tPLZ
VI = 2 x VCC
CIN
COUT
Input Capacitance
Output Capacitance
OPEN
3.3V
2.5
4.0
pF
CPD Power Dissipation
Capacitance
3.3
5.0
16
19.5
pF (Note 2)
Figure 2
Note 2: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD)(VCC)(fIN) + (ICCstatic).
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