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NC7WZ126 PDF даташит

Спецификация NC7WZ126 изготовлена ​​​​«Fairchild» и имеет функцию, называемую «TinyLogic UHS Dual Buffer with 3-STATE Outputs».

Детали детали

Номер произв NC7WZ126
Описание TinyLogic UHS Dual Buffer with 3-STATE Outputs
Производители Fairchild
логотип Fairchild логотип 

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NC7WZ126 Даташит, Описание, Даташиты
March 2001
Revised January 2005
NC7WZ126
TinyLogicUHS Dual Buffer with 3-STATE Outputs
General Description
The NC7WZ126 is a Dual Non-Inverting Buffer with inde-
pendent active HIGH enables for the 3-STATE outputs. The
Ultra High Speed device is fabricated with advanced
CMOS technology to achieve superior switching perfor-
mance with high output drive while maintaining low static
power dissipation over a broad VCC operating range. The
device is specified to operate over the 1.65V to 5.5V VCC
operating range. The inputs and outputs are high imped-
ance when VCC is 0V. Inputs tolerate voltages up to 5.5V
independent of VCC operating range. Outputs tolerate volt-
ages above VCC when in the 3-STATE condition.
Features
s Space saving US8 surface mount package
s MicroPakPb-Free leadless package
s Ultra High Speed; tPD 2.6 ns Typ into 50 pF at 5V VCC
s High Output Drive; ±24 mA at 3V VCC
s Broad VCC Operating Range: 1.65V to 5.5V
s Matches the performance of LCX when operated at
3.3V VCC
s Power down high impedance inputs/outputs
s Overvoltage tolerant inputs facilitate 5V to 3V
translation
s Outputs are overvoltage tolerant in 3-STATE mode
s Patented noise/EMI reduction circuitry implemented
Ordering Code:
Product
Order
Package Code
Package Description
Supplied As
Number
Number Top Mark
NC7WZ126K8X MAB08A WZ26 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel
NC7WZ126L8X MAC08A
T6 Pb-Free 8-Lead MicroPak, 1.6 mm Wide
5k Units on Tape and Reel
Pb-Free package per JEDEC J-STD-020B.
Logic Symbol
Connection Diagrams
Pin Descriptions
Pin Names
OEn
An
Yn
Description
Enable Inputs for 3-STATE Outputs
Inputs
3-STATE Outputs
Function Table
(Top View)
Pad Assignments for MicroPak
Inputs
OE An
HL
Output
Yn
L
H
L
L
H = HIGH Logic Level
H
L
H
L = LOW Logic Level
H
Z
Z
Z = 3-STATE
TinyLogicis a registered trademark of Fairchild Semiconductor Corporation.
(Top Thru View)
MicroPakis a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500397
www.fairchildsemi.com









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NC7WZ126 Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC)
DC Input Voltage (VIN) (Note 2)
DC Output Voltage (VOUT)
DC Input Diode Current (IIK)
@VIN < 0V
DC Output Diode Current (IOK)
@VOUT < 0V
DC Output Source/Sink Current (IOUT)
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
Junction Temperature under Bias (TJ)
Junction Lead Temperature (TL)
(Soldering, 10 seconds)
Power Dissipation (PD) @+85°C
0.5V to +7.0V
0.5V to +7.0V
0.5V to +7.0V
50 mA
50 mA
±50 mA
±100 mA
65°C to +150°C
+150°C
+260°C
250 mW
Recommended Operating
Conditions (Note 3)
Supply Voltage Operating (VCC)
Supply Voltage Data Retention (VCC)
Input Voltage (VIN)
Output Voltage (VOUT)
Active State
3-State
Operating Temperature (TA)
Input Rise and Fall Time (tr, tf)
VCC = 1.8V, 0.15V, 2.5V ± 0.2V
VCC = 3.8V ± 0.3V
VCC = 5.0V ± 0.5V
Thermal Resistance (θJA)
1.65V to 5.5V
1.5V to 5.5V
0V to 5.5V
0V to VCC
0V to 5.5V
40°C to +85°C
0 ns/V to 20 ns/V
0 ns/V to 10 ns/V
0 ns/V to 5 ns/V
250°C/W
Note 1: Absolute maximum ratings are DC values beyond which the device
may be damaged or have its useful life impaired. The datasheet specifica-
tions should be met, without exception, to ensure that the system design is
reliable over its power supply, temperature, and output/input loading vari-
ables. Fairchild does not recommend operation outside datasheet specifi-
cations.
Note 2: The input and output negative voltage ratings may be exceeded is
the input and output diode current ratings are observed.
Note 3: Unused inputs must be held HIGH or LOW. They may not float.
DC Electrical Characteristics
Symbol
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C
(V) Min Typ Max Min Max
VIH HIGH Level Input Voltage 1.65 to 1.95 0.75 VCC
0.75 VCC
. 2.3 to 5.5 0.7 VCC
0.7 VCC
VIL LOW Level Input Voltage 1.65 to 1.95
0.25 VCC
0.25 VCC
2.3 to 5.5
0.3 VCC
0.3 VCC
VOH HIGH Level Output Voltage 1.65
1.55
1.65
1.55
2.3 2.2 2.3
2.2
3.0 2.9 3.0
2.9
4.5 4.4 4.5
4.4
1.65
1.29
1.52
1.29
2.3 1.9 2.15
1.9
3.0 2.4 2.80
2.4
3.0 2.3 2.68
2.3
4.5 3.8 4.20
3.8
VOL
LOW Level Output Voltage
1.65
2.3
0.0 0.10
0.0 0.10
0.10
0.10
3.0
0.0 0.10
0.10
4.5
0.0 0.10
0.10
1.65
0.08 0.24
0.24
2.3 0.10 0.3 0.3
3.0 0.15 0.4 0.4
3.0
0.22 0.55
0.55
4.5
0.22 0.55
0.55
IIN Input Leakage Current 0 to 5.5
IOZ 3-STATE Output Leakage 1.65 to 5.5
±0.1
±0.5
±1
±5
IOFF
Power Off Leakage Current
0.0
ICC Quiescent Supply Current 1.65 to 5.5
1 10
1 10
Unit
V
V
V
V
V
V
µA
µA
µA
µA
Conditions
VIN = VIH IOH = −100 µA
or VIL
VIN = VIH
or VIL
IOH = −4 mA
IOH = −8 mA
IOH = −16 mA
IOH = −24 mA
IOH = −32 mA
VIN = VIH IOL = 100 µA
or VIL
IOL = 4 mA
VIN = VIH IOL = 8 mA
or VIL
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
VIN = 5.5V, GND
VIN = VIH or VIL
0 VOUT 5.5V
VIN or VOUT = 5.5V
VIN = 5.5V, GND
www.fairchildsemi.com
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NC7WZ126 Даташит, Описание, Даташиты
Noise Characteristics
Symbol
Parameter
VOLP (Note 4) Quiet Output Maximum Dynamic VOL
VOLV (Note 4) Quiet Output Minimum Dynamic VOL
VOHV (Note 4) Quiet Output Minimum Dynamic VOH
VIHD (Note 4) Minimum HIGH Level Dynamic Input Voltage
VILD (Note 4) Maximum LOW Level Dynamic Input Voltage
Note 4: Parameter guaranteed by design.
VCC
(V)
5.0
5.0
5.0
5.0
5.0
TA = +25°C
Typ Max
1.0
1.0
4.0
3.5
1.5
Units
V
V
V
V
V
Conditions
CL = 50 pF
CL = 50 pF
CL = 50 pF
CL = 50 pF
CL = 50 pF
AC Electrical Characteristics
Symbol
Parameter
VCC
TA = +25°C
TA = −40°C to +85°C
Figure
Units
Conditions
(V) Min Typ Max Min Max
Number
tPLH Propagation Delay
tPHL
An to Yn
1.8 ± 0.15
2.5 ± 0.2
3.3 ± 0.3
5.0 ± 0.5
2.0
1.0
0.8
0.5
12.0
7.5
5.2
4.5
2.0
1.0
0.8
0.5
13.0
8.0
5.5
4.8
CL = 15 pF
RD = 1 M
ns
S1 = OPEN
Figures
1, 3
tPLH
tPHL
tOSLH
tOSHL
tPZL
tPZH
Propagation Delay
An to Yn
3.3 ± 0.3
5.0 ± 0.5
1.2
0.8
Output to Output Skew
(Note 5)
3.3 ± 0.3
5.0 ± 0.5
Output Enable Time
1.8 ± 0.15
2.5 ± 0.2
3.3 ± 0.3
5.0 ± 0.5
3.0
1.8
1.2
0.8
tPLZ Output Disable Time 1.8 ± 0.15 2.5
tPHZ
2.5 ± 0.2 1.5
3.3 ± 0.3 0.8
5.0 ± 0.5 0.3
CIN
COUT
CPD
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance
0
5.0
3.3
5.0
5.7 1.2
5.0 0.8
1.0
0.8
14.0
8.5
6.2
5.5
3.0
1.8
1.2
0.8
12.0
8.0
5.7
4.7
2.5
1.5
0.8
0.3
2.5
4
10
12
6.0
5.3
1.0
0.8
15.0
9.0
6.5
5.8
13.0
8.5
6.0
5.0
CL = 50 pF
ns RD = 500
S1 = OPEN
Figures
1, 3
CL = 50 pF
ns RD = 500
S1 = OPEN
Figures
1, 3
CL = 50 pF
RD, RU = 500
ns
S1 = GND for tPZH
Figures
1, 3
S1 = VI for tPZL
VI = 2 × VCC
CL = 50 pF
RD, RU = 500
ns
S1 = GND for tPHZ
Figures
1, 3
S1 = VI for tPLZ
VI = 2 × VCC
pF
pF (Note 6)
Figure 2
Note 5: Parameter guaranteed by design. tOSLH = | tPLHmax tPLHmin |; tOSHL = | tPHLmax tPHLmin |.
Note 6: CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output
loading and operating at 50% duty cycle. (See Figure 2.) CPD is related to ICCD dynamic operating current by the expression:
ICCD = (CPD) (VCC) (fIN) + (ICC static).
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