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NCP1232DR2 PDF даташит

Спецификация NCP1232DR2 изготовлена ​​​​«ON» и имеет функцию, называемую «Microprocessor Monitor».

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Номер произв NCP1232DR2
Описание Microprocessor Monitor
Производители ON
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NCP1232DR2 Даташит, Описание, Даташиты
NCP1232
Microprocessor Monitor
The NCP1232 is a fully–integrated processor supervisor. It provides
three important functions to safeguard processor functionality:
precision power on/off reset control, watchdog timer and external
reset override.
On power–up, the NCP1232 holds the processor in the reset state for
a minimum of 250 msec after VCC is within tolerance to ensure a
stable system start–up.
Microprocessor functionality is monitored by the on–board
watchdog circuit. The microprocessor must provide a periodic
low–going signal on the ST input. Should the processor fail to supply
this signal within the selected time–out period (150 msec, 600 msec or
1200 msec), an out–of–control processor is indicated and the
NCP1232 issues a processor reset as a result.
The outputs of the NCP1232 are immediately driven active when
the PB input is brought low by an external push–button switch or other
electronic signal. When connected to a push–button switch, the
NCP1232 provides contact debounce.
The NCP1232 is packaged in a space–saving 8–pin plastic SOIC
package and requires no external components.
Features
Precision Voltage Monitor
(Adjustable +4.5 V or +4.75 V)
Reset Pulse Width (250 msec Min)
No External Components
Adjustable Watchdog Timer
(150 msec, 600 msec or 1.2 sec)
Debounced Manual Reset Input for External Override
Applications
Computers
Controllers
Intelligent Instruments
Automotive Systems
Critical µP Power Monitoring
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8
1
SO–8
D SUFFIX
CASE 751
MARKING
DIAGRAM
8
NCP
1232
YWWXZ
1
YY, Y
WW
X
Z
= Year
= Work Week
= Assembly ID Code
= Subcontractor ID Code
PIN CONNECTIONS
8–Pin SOIC
PB RST 1
TD 2
TOL 3
GND 4
8 VCC
7 ST
6 RST
5 RST
(Top View)
ORDERING INFORMATION
Device
Package
Shipping
NCP1232DR2
SO–8 2500 Tape & Reel
© Semiconductor Components Industries, LLC, 2000
May, 2000 – Rev. 0
1
Publication Order Number:
NCP1232/D









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NCP1232DR2 Даташит, Описание, Даташиты
NCP1232
FUNCTIONAL BLOCK DIAGRAM
VDCC
TOL
5%/10%
TOLERANCE
SELECT
REF
PB RST
DEBOUNCE
RESET
GENERATOR
NCP1232
TD WATCHDOG
TIMEBASE
SELECT
GND
WATCHDOG
TIMER
RST
RST
ST
Pin No.
(8–Pin SOIC)
1
2
3
4
5
6
7
8
Symbol
PB RST
TD
TOL
GND
RST
RST
ST
VCC
PIN DESCRIPTION
Description
Push–button Reset Input. A debounced active–low input that ignores pulses less than 1 msec in
duration and is guaranteed to recognize inputs of 20 msec or greater.
Time Delay Set. The watchdog time–out select input (tTD = 150 msec for
TD = 0 V, tTD = 600 msec for TD = open, tTD = 1.2 sec for TD = VCC.)
Tolerance Input. Connect to GND for 5% tolerance or to VCC for 10% tolerance.
Ground.
Reset Output (Active High) – goes active:
1. If VCC falls below the selected reset voltage threshold
2. If PB RST is forced low
3. If ST is not strobed within the minimum time–out period
4. During power–up
Reset Output (Active Low, Open Drain) – see RST.
Strobe Input. Input for watchdog timer.
The +5 V Power Supply Input.
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NCP1232DR2 Даташит, Описание, Даташиты
NCP1232
ABSOLUTE MAXIMUM RATINGS* Voltage on any pin (with respect to GND) –0.3 V to +5.8 V
Rating
Value
Unit
Operating Temperature Range
–40 to +85
°C
Storage Temperature Range, Tstg
–65 to +150
°C
Lead Temperature (Soldering, 10 sec)
+300
°C
*Stresses beyond those listed under “Absolute Maximum Ratings’’ may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX; VCC = +4.5 V to 5.5 V, unless otherwise specified.)
Characteristic
Symbol
Test Conditions
Min Typ Max
Supply Voltage
VCC
– 4.5 5.0 5.5
ST and PB RST Input High Level
ST and PB RST Input Low Level
Input Leakage ST, TOL
VIH
Note 1.
2.0 – VCC +0.3
VIL – –0.3 – +0.8
IL – –1.0 – +1.0
Output Current RST
Current RST, RST
IOH
VOH = 2.4 V
–1.0 –12
IOL
VOL = 0.4 V
2.0 10
Operating Current
VCC 5% Trip Point (Note 3.)
VCC 10% Trip Point (Note 3.)
ICC
VCCTP
VCCTP
Note 2.
TOL = GND
TOL = VCC
– 50 200
4.50 4.62 4.74
4.25 4.37 4.49
Unit
V
V
V
µA
mA
mA
µA
V
V
CAPACITANCE (Note 4.) (TA = +25°C)
Characteristic
Symbol
Test Conditions
Min Typ Max
Input Capacitance ST, TOL
Output Capacitance RST, RST
CIN
COUT
– – 5.0
– – 7.0
"AC ELECTRICAL CHARACTERISTICS (TA = TMIN to TMAX; VCC = +5.0 V to 10%, unless otherwise specified.)
Characteristic
Symbol
Test Conditions
Min Typ Max
PB RST (Note 5.)
PB RST Delay
Reset Active Time
ST Pulse Width
ST Time–out Period
VCC Fall Time (Note 4.)
VCC Rise Time (Note 4.)
VCC Detect to RST High and RST Low
VCC Detect to RST High and RST Open
(Note 6.)
tPB
tPBD
tRST
tST
tTD
tF
tR
tRPD
tRPU
Figure 3
Figure 3
Figure 4
Figure 4
TD Pin = 0 V
TD Pin = Open
TD Pin = VCC
Figure 5
Figure 6
Figure 7, VCC Falling
Figure 8, VCC Rising
20
1.0
250
20
62.5
250
500
10
0
250
4.0
610
150
600
1200
610
20
1000
250
1000
2000
100
1000
1. PB RST is internally pulled up to VCC with an internal impedance of typically 40 k.
2. Measured with outputs open.
3. All voltages references to GND.
4. Guaranteed by design.
5. PB RST must be held low for a minimum of 20 msec to guarantee a reset.
6. tR = 5 µsec.
Unit
pF
pF
Unit
msec
msec
msec
nsec
msec
µsec
µsec
nsec
msec
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