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PDF NDB6050 Data sheet ( Hoja de datos )

Número de pieza NDB6050
Descripción N-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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March 1996
NDP6050 / NDB6050
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process has
been especially tailored to minimize on-state resistance,
provide superior switching performance, and withstand high
energy pulses in the avalanche and commutation modes.
These devices are particularly suited for low voltage
applications such as automotive, DC/DC converters, PWM
motor controls, and other battery powered circuits where fast
switching, low in-line power loss, and resistance to transients
are needed.
Features
48A, 50V. RDS(ON) = 0.025@ VGS=10V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need for
an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through hole
and surface mount applications.
________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol Parameter
TC = 25°C unless otherwise noted
NDP6050
VDSS Drain-Source Voltage
VDGR
Drain-Gate Voltage (RGS < 1 M)
VGSS Gate-Source Voltage - Continuous
- Nonrepetitive (tP < 50 µs)
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
50
50
± 20
± 40
48
144
100
0.67
-65 to 175
275
NDB6050
Units
V
V
V
A
W
W/°C
°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP6050 Rev. A1 / NDB6050 Rev. B

1 page




NDB6050 pdf
Typical Electrical Characteristics (continued)
1.15
ID = 250µA
1.1
1.05
1
0.95
0.9
-50
-25
0 25 50 75 100 125 150 175
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation with
Temperature
60
VGS = 0V
10
1 TJ = 125°C
0.1
25°C
-55°C
0.01
0.001
0.0001
0.2
0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage
Variation with Current and Temperature
3000
2000
1000
Ciss
Coss
500
300
200
100
1
f = 1 MHz
VGS = 0V
Crss
23
5
10 20
VDS , DRAIN TO SOURCE VOLTAGE (V)
30
50
Figure 9. Capacitance Characteristics
20
ID = 48A
15
10
VDS = 12V
48V
24V
5
0
0 20 40 60
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics
80
VIN
VG S
RGEN
G
VDD
RL
D
VOUT
DUT
S
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE W IDTH
Figure 11. Switching Test Circuit
Figure 12. Switching Waveforms
NDP6050 Rev. A1 / NDB6050 Rev. B

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