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PDF NDC651N Data sheet ( Hoja de datos )
| Número de pieza | NDC651N | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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March 1996
NDC651N
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These N-Channel logic level enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is tailored to minimize on-state resistance. These
devices are particularly suited for low voltage applications in
notebook computers, portable phones, PCMICA cards, and
other battery powered circuits where fast switching, and low
in-line power loss are needed in a very small outline surface
mount package.
Features
3.2A, 30V. RDS(ON) = 0.09Ω @ VGS = 4.5V
RDS(ON) = 0.06Ω @ VGS = 10V.
Proprietary SuperSOTTM-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
____________________________________________________________________________________________
43
52
61
Absolute Maximum Ratings TA = 25°C unless otherwise note
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
PD Maximum Power Dissipation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
NDC651N
30
20
3.2
15
1.6
1
0.8
-55 to 150
78
30
Units
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDC651N Rev. D1
1 page  
Typical Electrical Characteristics (continued)
1.16
1.12
I D = 250µA
1.08
1.04
1
0.96
0.92
0.88
-50 -25 0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature
10
5 VGS = 0V
1
0.5
TJ = 125°C
0.1
25°C
-55°C
0.01
0.001
0.2
0.4 0.6 0.8
1
V SD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 8. Body Diode Forward Voltage Variation with
Source Current and Temperature
1000
800
500
200
C iss
C oss
100
50
30
0.1
f = 1 MHz
V GS = 0V
0.2
0.5 1
2
5 10
VDS , DRAIN TO SOURCE VOLTAGE (V)
C rss
30
Figure 9. Capacitance Characteristics
10
ID = 3.2A
8
6
VDS = 5V
15V
10V
4
2
0
02468
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics
10
VIN
VGS
RGEN
G
VDD
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms
NDC651N Rev. D1
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet NDC651N.PDF ] | |
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