NDC7002N PDF даташит
Спецификация NDC7002N изготовлена «Fairchild» и имеет функцию, называемую «Dual N-Channel Enhancement Mode Field Effect Transistor». |
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Детали детали
Номер произв | NDC7002N |
Описание | Dual N-Channel Enhancement Mode Field Effect Transistor |
Производители | Fairchild |
логотип |
10 Pages
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March 1996
NDC7002N
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
These dual N-Channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been designed to minimize
on-state resistance, provide rugged and reliable
performance and fast switching. These devices is
particularly suited for low voltage applications requiring a
low current high side switch.
Features
0.51A, 50V, RDS(ON) = 2Ω @ VGS=10V
High density cell design for low RDS(ON).
Proprietary SuperSOTTM-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High saturation current.
____________________________________________________________________________________________
SOT-6 (SuperSOTTM-6)
Absolute Maximum RatingsTA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
43
52
61
NDC7002N
50
20
0.51
1.5
0.96
0.9
0.7
-55 to 150
130
60
Units
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDC7002N.SAM
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol Parameter
Conditions
OFF CHARACTERISTICS
BVDSS
IDSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
VGS = 0 V, ID = 250 µA
VDS = 40 V, VGS = 0 V
IGSSF Gate - Body Leakage, Forward
IGSSR Gate - Body Leakage, Reverse
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VGS = 20 V, VDS = 0 V
VGS = -20 V, VDS= 0 V
VDS = VGS, ID = 250 µA
RDS(ON)
Static Drain-Source On-Resistance
VGS = 10 V, ID = 0.51 A
ID(on) On-State Drain Current
gFS Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
tD(on) Turn - On Delay Time
tr Turn - On Rise Time
tD(off) Turn - Off Delay Time
tf Turn - Off Fall Time
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
VGS = 4.5 V, ID = 0.35 A
VGS = 10 V, VDS = 10 V
VDS = 10 V, ID = 0.51 A
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
VDD = 25 V, ID = 0.25 A,
VGS = 10 V, RGEN = 25 Ω
VDS = 25 V,
ID = 0.51 A, VGS = 10 V
Min Typ Max Units
50
TJ = 125°C
V
1 µA
500
100 nA
-100 nA
1 1.9 2.5 V
TJ = 125°C 0.8 1.5 2.2
12
TJ = 125°C
1.7 3.5
1.6 4
Ω
1.5 A
400 mS
20 pF
13 pF
5 pF
6 20
6 20
11 20
5 20
1
0.19
0.33
nS
nC
nC
nC
NDC7002N.SAM
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ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol Parameter
Conditions
Min Typ Max Units
DRAIN-SOURCE DIODE CHARACTERISTICS
IS Maximum Continuous Source Current
ISM Maximum Pulse Source Current (Note 2)
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 0.51 A (Note 2)
0.51
1.5
0.8 1.2
A
A
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design.
( ) = = = ( ) ×PD t
TJ−TA
RθJ A(t)
TJ−TA
RθJ C+RθCA(t)
I
2
D
t
RDS(ON ) TJ
Typical RθJA for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 130oC/W when mounted on a 0.125 in2 pad of 2oz cpper.
b. 140oC/W when mounted on a 0.005 in2 pad of 2oz cpper.
c. 180oC/W when mounted on a 0.0015 in2 pad of 2oz cpper.
1a 1b 1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDC7002N.SAM
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Номер в каталоге | Описание | Производители |
NDC7002 | Dual N-Channel Enhancement Mode Field Effect Transistor | Fairchild |
NDC7002N | Dual N-Channel Enhancement Mode Field Effect Transistor | Fairchild |
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