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PDF NDC7003P Data sheet ( Hoja de datos )
| Número de pieza | NDC7003P | |
| Descripción | Dual P-Channel Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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March 1996
NDC7003P
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description
These dual P-Channel enhancement mode power field
effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This
very high density process has been designed to minimize
on-state resistance, provide rugged and reliable
performance and fast switching. This product is
particularly suited to low voltage applications requiring a
low current high side switch.
Features
-0.34A, -50V. RDS(ON)= 5Ω @ VGS=-10V.
High density cell design for low RDS(ON).
Proprietary SuperSOTTM-6 package design using copper
lead frame for superior thermal and electrical capabilities.
High saturation current.
____________________________________________________________________________________________
SOT-6 (SuperSOTTM-6)
43
52
61
Absolute Maximum RatingsTA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
NDC7003P
-50
-20
-0.34
-1
0.96
0.9
0.7
-55 to 150
130
60
Units
V
V
A
W
°C
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
1 page  
Typical Electrical Characteristics (continued)
1.15
1.1
I D = 250µA
1.05
1
0.95
0.9
-50
-25
0
25 50 75 100 125 150
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation with
Temperature.
1
0.5 VGS =0V
0.1
0.05
TJ = 125°C
25°C
-55°C
0.01
0.005
0.001
0.2
0.4 0.6 0.8 1 1.2 1.4 1.6
-VSD , BODY DIODE FORWARD VOLTAGE (V)
1.8
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
100
5 0 Ciss
2 0 Coss
10
5
f = 1 MHz
2 VGS = 0V
Crss
1
0.1 0.2
0.5 1
2
5 10 20
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
50
-10
I D = -0.34A
-8
-6
V DS = -12V -24
-48
-4
-2
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
1.6
0.5
V DS =- 10V
0.4
0.3
0.2
TJ = -55°C
25°C
125°C
0.1
0
-0.2 -0.4 -0.6 -0.8
ID , DRAIN CURRENT (A)
Figure 11. Transconductance Variation with Drain
Current and Temperature.
-1
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