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PDF NDP6020P Data sheet ( Hoja de datos )
| Número de pieza | NDP6020P | |
| Descripción | P-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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September 1997
NDP6020P / NDB6020P
P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These logic level P-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process has been especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited for
low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
-24
A,
-20
V.
RDS(ON)
RDS(ON)
RDS(ON)
=
=
=
000...0007755ΩΩΩ@@@VVGVGSGS==S=-2-4-.27.5.5VV.V. .
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through
hole and surface mount applications.
________________________________________________________________________________
S
G
D
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter
NDP6020P
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage - Continuous
ID Drain Current - Continuous
- Pulsed
PD Total Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG Operating and Storage Temperature Range
-20
±8
-24
-70
60
0.4
-65 to 175
NDB6020P
Units
V
V
A
W
W/°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP6020P Rev.C1
1 page  
Typical Electrical Characteristics (continued)
1.08
1.06
ID = -250µA
1.04
1.02
1
0.98
0.96
-50
-25
0 25 50 75 100 125
TJ , JUNCTION TEMPERATURE (°C)
150
175
Figure 7. Breakdown Voltage Variation with
Temperature.
20
10
4 VGS = 0V
1
0 .1
0 .0 1
TJ = 125°C
25°C
-55°C
0 .0 0 1
0 .0 0 0 1
0
0 .2 0 .4 0.6 0 .8
1
-V SD , BODY DIODE FORWARD VOLTAGE (V)
1 .2
Figure 8. Body Diode Forward Voltage
Variation with Current and Temperature.
4000
3000
2000
Ciss
1000
500
Coss
300
200 f = 1 MHz
VGS = 0 V
Crss
100
0 .1
0 .2
0 .5 1
2
5 10
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
20
Figure 9. Capacitance Characteristics.
VIN
VG S
RGEN
G
-VD D
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit.
8
I D = -24A
6
4
VDS = -5V
-15V
-10V
2
0
0 10 20 30
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
40
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
V IN
10%
10%
50%
10%
90%
50%
PULSE WIDTH
INVERTED
Figure 12. Switching Waveforms.
NDP6020P Rev.C1
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NDP6020P.PDF ] | |
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