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PDF NDP7050 Data sheet ( Hoja de datos )
| Número de pieza | NDP7050 | |
| Descripción | N-Channel Enhancement Mode Field Effect Transistor | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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March 1996
NDP7050 / NDB7050
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited
for low voltage applications such as automotive, DC/DC
converters, PWM motor controls, and other battery powered
circuits where fast switching, low in-line power loss, and
resistance to transients are needed.
Features
75A, 50V. RDS(ON) = 0.013Ω @ VGS=10V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low RDS(ON).
TO-220 and TO-263 (D2PAK) package for both through
hole and surface mount applications.
_______________________________________________________________________________
D
G
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol Parameter
NDP7050
VDSS Drain-Source Voltage
VDGR Drain-Gate Voltage (RGS < 1 MΩ)
VGSS Gate-Source Voltage - Continuous
- Nonrepetitive (tP < 50 µs)
ID Drain Current - Continuous
- Pulsed
PD Maximum Power Dissipation @ TC = 25°C
Derate above 25°C
TJ,TSTG
TL
Operating and Storage Temperature Range
Maximum lead temperature for soldering
purposes, 1/8" from case for 5 seconds
50
50
± 20
± 40
75
225
150
1
-65 to 175
275
NDB7050
Units
V
V
V
A
W
W/°C
°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP7050.SAM Rev. D
1 page  
Typical Electrical Characteristics (continued)
1 .15
1 .1
I D = 250µA
1 .05
1
0 .95
0 .9
-50
-25
0 25 50 75 100 125 150 175
TJ , JUNCTION TEM PERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
100
50 VGS = 0V
10
TJ = 125°C
1
0.1
25°C
-5 5 ° C
0.01
0.001
0.2
0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORW A RD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage
Variation with Current and Temperature.
5000
3000
2000
1000
Ciss
Coss
500
300
200
1
f = 1 MHz
VGS = 0V
Crss
2 5 10 20 30
VDS , DRAIN TO SOURCE VOLTAGE (V)
60
Figure 9. Capacitance Characteristics.
20
ID = 75A
15
10
VDS = 12V
48V
24V
5
0
0 25 50 75 100 125
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
150
VIN
VGS
RGEN
G
VDD
RL
D
V OUT
DUT
S
t d (o n )
ton
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDP7050.SAM Rev. D
5 Page 
TO-263AB/D2PAK Tape and Reel Data and Package Dimensions, continued
TO-263AB/D2PAK (FS PKG Code 45)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 1.4378
August 1998, Rev. A
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet NDP7050.PDF ] | |
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