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PDF NDS8926 Data sheet ( Hoja de datos )

Número de pieza NDS8926
Descripción Dual N-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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July 1996
NDS8926
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as DC motor control
and DC/DC conversion where fast switching, low in-line power
loss, and resistance to transients are needed.
5.5 A, 20 V. RDS(ON) = 0.035 @ VGS = 4.5 V
RDS(ON) = 0.045 @ VGS = 2.7 V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
___________________________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings TA = 25°C unless otherwise note
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note1c)
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS8926
20
8
5.5
20
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS8926 Rev. D2

1 page




NDS8926 pdf
Typical Electrical Characteristics
1.12
1.08
ID = 250µA
1.04
1
0.96
0.92
-50 -25 0 25 50 75 100 125
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
150
30
10 V GS = 0V
5
1
TJ = 125°C
25°C
0.1 -55°C
0.01
0.001
0.0001
0
0.2 0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
3000
2000
1000
500
C iss
C oss
300
200 f = 1 MHz
V GS = 0V
C rss
100
0.1
0.2
0.5 1
2
5 10
VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
20
5
ID = 5.5A
4
3
VDS = 5V
15V
10V
2
1
0
0 5 10 15 20
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
25
VIN
VGS
RGEN
G
VDD
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
t on
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms.
NDS8926 Rev. D2

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