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Número de pieza | NDS9435A | |
Descripción | Single P-Channel Enhancement Mode Field Effect Transistor | |
Fabricantes | Fairchild | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de NDS9435A (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
No Preview Available ! May 1996
NDS9435A
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high
cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state
resistance, provide superior switching performance, and
withstand high energy pulses in the avalanche and
commutation modes. These devices are particularly suited
for low voltage applications such as notebook computer
power management and other battery powered circuits
where fast switching, low in-line power loss, and resistance
to transients are needed.
Features
-5.3A, -30V. RDS(ON) = 0.05Ω @ VGS = -10V
RDS(ON) = 0.07Ω @ VGS = -6V
RDS(ON) = 0.09Ω @ VGS = -4.5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely
used surface mount package.
____________________________________________________________________________________________
D
D
D
D
SO-8
pin 1
S
G
S
S
54
63
72
81
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
(Note 1a)
PD Maximum Power Dissipation
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient (Note 1a)
Thermal Resistance, Junction-to-Case (Note 1)
© 1999 Fairchild Semiconductor Corporation
NDS9435A
-30
± 20
± 5.3
± 20
2.5
1.2
1
-55 to 150
50
25
Units
V
V
A
W
°C
°C/W
°C/W
NDS9435A Rev B
1 page Typical Electrical Characteristics (continued)
1.1
1.08
ID = -250µA
1.06
1.04
1.02
1
0.98
0.96
0.94
-50
-25
0 25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage
Variation with Temperature
20
10 VGS = 0V
5
1
TJ = 125°C
0.1
25°C
-55°C
0.01
0.001
0
0.3 0.6 0.9 1.2
-VSD , BODY DIODE FORWARD VOLTAGE (V)
1.5
Figure 8. Body Diode Forward Voltage Variation
with Source Current and
Temperature
3000
2000
1000
500
300
200
100
0 .1
C iss
C oss
f = 1 MHz
VGS = 0V
C rss
0 .3 1 3 1 0
-VDS , DRA IN TO SOURCE VOLTAGE (V)
30
Figure 9. Capacitance Characteristics
10
I D = -5.3A
8
VDS = -10V -15V
-20V
6
4
2
0
0 10 20 30
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics
40
VIN
VGS
R GEN
G
-VDD
RL
D
V OUT
DUT
S
Figure 11. Switching Test Circuit
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VOUT
10%
10%
90%
VIN
10%
50%
50%
PULSE W IDTH
Figure 12. Switching Waveforms
INVERTED
NDS9435A Rev B
5 Page |
Páginas | Total 10 Páginas | |
PDF Descargar | [ Datasheet NDS9435A.PDF ] |
Número de pieza | Descripción | Fabricantes |
NDS9435A | Single P-Channel Enhancement Mode Field Effect Transistor | Fairchild |
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