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PDF NDS9947 Data sheet ( Hoja de datos )

Número de pieza NDS9947
Descripción Dual P-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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NDS9947
Dual P-Channel Enhancement Mode Field Effect Transistor
February 1996
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
Features
-3.5A, -20V. RDS(ON) = 0.1@ VGS = 10V
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
________________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID
Drain Current
- Continuous TA = 25°C (Note 1a)
- Continuous TA = 70°C (Note 1a)
- Pulsed
TA = 25°C
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS9947
-20
± 20
± 3.5
± 2.5
± 10
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS9947.SAM

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NDS9947 pdf
Typical Electrical Characteristics (continued)
1.1
ID = -250µA
1.05
1
0.95
-50 -25 0 25 50 75 100 125 150
T J , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage
Variation with Temperature.
10
5 V GS = 0V
TJ = 125°C
1
0.5
25°C
0.1
-55°C
0.01
0.001
0.3
0.6 0.9 1.2 1.5
-VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 8. Body Diode Forward Voltage
Variation with Source
Current and Temperature.
1.8
1500
1000
500
C iss
C oss
300
200 f = 1 MHz
VGS = 0V
C rss
100
0.1
0.2
0.5 1
2
5
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Figure 9. Capacitance Characteristics.
10
20
-10
IDS = -3.5A
-8
VDS = -5V
-10V
-15V
-6
-4
-2
0
0 5 10 15
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
20
V IN
VG S
RGEN
G
VDD
RL
D
V OUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
ton
tr
90%
td(off)
toff
tf
90%
VO U T
10%
10%
90%
VIN
10%
50%
50%
PULSE WIDTH
Figure 12. Switching Waveforms.
INVERTED
NDS9947.SAM

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