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PDF NDS9959 Data sheet ( Hoja de datos )

Número de pieza NDS9959
Descripción Dual N-Channel Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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NDS9959
Dual N-Channel Enhancement Mode Field Effect Transistor
February 1996
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance, provide
superior switching performance, and withstand high energy
pulses in the avalanche and commutation modes. These
devices are particularly suited for low voltage applications such
as DC motor control and DC/DC conversion where fast
switching, low in-line power loss, and resistance to transients
are needed.
Features
2.0A, 50V. RDS(ON) = 0.3@ VGS = 10V
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
_________________________________________________________________________________
54
63
72
81
Absolute Maximum Ratings
Symbol Parameter
TA = 25°C unless otherwise noted
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID
Drain Current - Continuous @ TA = 25°C
(Note 1a)
- Continuous @ TA = 70°C
(Note 1a)
- Pulsed @ TA = 25°C
PD Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
(Note 1c)
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDS9959
50
± 20
± 2.0
± 1.6
±8
2
1.6
1
0.9
-55 to 150
78
40
Units
V
V
A
W
°C
°C/W
°C/W
NDS9959.SAM

1 page




NDS9959 pdf
Typical Electrical Characteristics (continued)
1.1
1.05
ID = 250µA
1
0.95
0.9
0.85
-50
-25
0
25 50 75 100 125 150
TJ , JUNCTION TEMPERATURE (°C)
Figure 7. Breakdown Voltage Variation with
Temperature.
10
3 VGS =0V
1
0.3
0.1
0.03
0.01
TJ = 125°C 25°C -55°C
0.003
0.001
0.2
0.4 0.6 0.8 1 1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 8. Body Diode Forward Voltage
Variation with Current and Temperature
400
200 C iss
100 C oss
50
20
f = 1 MHz
10 VGS = 0V
C rss
0.1 0.2
0.5 1
2
5 10
VDS , DRAIN TO SOURCE VOLTAGE (V)
20
Figure 9. Capacitance Characteristics.
50
14
12 ID = 1.3A
10
8
VDS = 10V
40V
20V
6
4
2
0
0123456
Qg , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
VIN
VGS
RGEN
G
VDD
RL
D
V OUT
DUT
S
Figure 11. Switching Test Circuit
t d(on)
t on
tr
90%
td(off)
toff
tf
90%
VO U T
10%
10%
90%
INVERTED
VIN
10%
50%
50%
PULSE WIDTH
Figure 12. Switching Waveforms
NDS9959.SAM

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