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PDF NDT410EL Data sheet ( Hoja de datos )

Número de pieza NDT410EL
Descripción N-Channel Logic Level Enhancement Mode Field Effect Transistor
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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August 1996
NDT410EL
N-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
Power SOT N-Channel logic level enhancement mode
power field effect transistors are produced using
Fairchild's proprietary, high cell density, DMOS
technology. This very high density process is especially
tailored to minimize on-state resistance, provide superior
switching performance, and withstand high energy pulses
in the avalanche and commutation modes. These devices
are particularly suited for low voltage applications such as
automotive, DC/DC converters, PWM motor controls, and
other battery powered circuits where fast switching, low
in-line power loss, and resistance to transients are needed.
Features
2.1A 100V. RDS(ON) = 0.25@ VGS = 5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
DD
GDS
ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise noted
Symbol Parameter
VDSS Drain-Source Voltage
VGSS Gate-Source Voltage
ID Drain Current - Continuous
- Pulsed
PD Maximum Power Dissipation
(Note 1a)
(Note 1a)
(Note 1b)
(Note 1c)
TJ,TSTG Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
* Order option J23Z for cropped center drain lead.
(Note 1a)
(Note 1)
© 1997 Fairchild Semiconductor Corporation
GS
NDT410EL
100
20
2.1
10
3
1.3
1.1
-65 to 150
42
12
Units
V
V
A
W
°C
°C/W
°C/W
NDT410EL Rev. B1

1 page




NDT410EL pdf
Typical Electrical Characteristics (continued)
1.15
ID = 250µA
1.1
1.05
1
0.95
0.9
-50
-25
0 25 50 75 100 125 150 175
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation with
Temperature.
10
5 GVS = 0V
1 TJ = 125°C
0.5
0.1
0.05
25°C
-55°C
0.01
0.4
0.6 0.8
1
V , BODY DIODE FORWARD VOLTAGE (V)
SD
1.2
Figure 8. Body Diode Forward Voltage
Variation with Current and Temperature.
1300
1000
500
300
200
100
C iss
C oss
50
10
0.1
f = 1 MHz
V GS = 0V
C rss
0.2
0.5 1
2
5 10 20
VDS , DRAIN TO SOURCE VOLTAGE (V)
50
Figure 9. Capacitance Characteristics.
10
ID = 2.1A
8
VDS = 20V
50V
80V
6
4
2
0
0 5 10 15
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
20
VIN
VG S
RGEN
G
VDD
RL
D
VOUT
DUT
S
Figure 11. Switching Test Circuit.
t d(on)
t on
tr
90%
td(off)
toff
tf
90%
VO U T
VIN
10%
10%
50%
10%
90%
INVERTED
50%
PULSE WIDTH
Figure 12. Switching Waveforms.
NDT410EL Rev. B1

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