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Número de pieza | NTHS5404T1G | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NTHS5404
Power MOSFET
20 V, 7.2 A, N−Channel ChipFETE
Features
• Low RDS(on) for Higher Efficiency
• Logic Level Gate Drive
• Miniature ChipFET Surface Mount Package Saves Board Space
• Pb−Free Package is Available
Applications
• Power Management in Portable and Battery−Powered Products; i.e.,
Cellular and Cordless Telephones and PCMCIA Cards
http://onsemi.com
V(BR)DSS
20 V
RDS(on) TYP
25 mW @ 4.5 V
ID MAX
7.2 A
D
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Steady
Symbol 5 Secs State
Unit
Drain−Source Voltage
Gate−Source Voltage
Continuous Drain Current
(TJ = 150°C) (Note 1)
TA = 25°C
TA = 85°C
Pulsed Drain Current
Continuous Source Current
(Diode Conduction) (Note 1)
VDS 20 V
VGS "12 V
ID A
7.2 5.2
5.2 3.8
IDM
"20
A
IS 7.2 5.2 A
Maximum Power Dissipation
(Note 1)
TA = 25°C
TA = 85°C
Operating Junction and Storage
Temperature Range
PD
TJ, Tstg
2.5 1.3
1.3 0.7
−55 to +150
W
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface Mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[1 oz] including traces).
G
S
N−Channel MOSFET
ChipFET
CASE 1206A
STYLE 1
PIN
CONNECTIONS
D8
D7
D6
S5
1D
2D
3D
4G
MARKING
DIAGRAM
18
27
36
45
A2 = Specific Device Code
M = Month Code
ORDERING INFORMATION
Device
Package
Shipping†
NTHS5404T1 ChipFET 3000/Tape & Reel
NTHS5404T1G ChipFET 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2004
October, 2004 − Rev. 3
1
Publication Order Number:
NTHS5404T1/D
1 page 0.457
0.018
2.032
0.08
NTHS5404
SOLDERING FOOTPRINT*
0.635
0.025
2.032
0.08
1.727
0.068
0.66
0.026
0.711
0.028
Figure 12. Basic
0.457
0.018
0.66
0.026
0.711
0.028
Figure 13. Style 1
0.178
0.007
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BASIC PAD PATTERNS
The basic pad layout with dimensions is shown in
Figure 12. This is sufficient for low power dissipation
MOSFET applications, but power semiconductor
performance requires a greater copper pad area,
particularly for the drain leads.
The minimum recommended pad pattern shown in
Figure 13 improves the thermal area of the drain
connections (pins 1, 2, 3, 6, 7, 8) while remaining within the
confines of the basic footprint. The drain copper area is
0.0054 sq. in. (or 3.51 sq. mm). This will assist the power
dissipation path away from the device (through the copper
lead−frame) and into the board and exterior chassis (if
applicable) for the single device. The addition of a further
copper area and/or the addition of vias to other board layers
will enhance the performance still further.
http://onsemi.com
5
5 Page |
Páginas | Total 6 Páginas | |
PDF Descargar | [ Datasheet NTHS5404T1G.PDF ] |
Número de pieza | Descripción | Fabricantes |
NTHS5404T1 | Power MOSFET ( Transistor ) | ON Semiconductor |
NTHS5404T1G | Power MOSFET ( Transistor ) | ON Semiconductor |
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