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PDF OP297 Data sheet ( Hoja de datos )

Número de pieza OP297
Descripción Dual Low Bias Current Precision Operational Amplifier
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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8/21/97 4:00 PM
a
Dual Low Bias Current
Precision Operational Amplifier
OP297
FEATURES
Precision Performance in Standard SO-8 Pinout
Low Offset Voltage: 50 V max
Low Offset Voltage Drift: 0.6 V/؇C max
Very Low Bias Current:
␣ ␣ +25؇C (100 pA max)
␣ ␣ –55؇C to +125؇C (450 pA max)
Very High Open-Loop Gain (2000 V/mV min)
Low Supply Current (Per Amplifier): 625 A max
Operates From 62 V to 620 V Supplies
High Common-Mode Rejection: 120 dB min
Pin Compatible to LT1013, AD706, AD708, OP221,
␣ ␣ LM158, and MC1458/1558 with Improved Performance
APPLICATIONS
Strain Gauge and Bridge Amplifiers
High Stability Thermocouple Amplifiers
Instrumentation Amplifiers
Photo-Current Monitors
High-Gain Linearity Amplifiers
Long-Term Integrators/Filters
Sample-and-Hold Amplifiers
Peak Detectors
Logarithmic Amplifiers
Battery-Powered Systems
GENERAL DESCRIPTION
The OP297 is the first dual op amp to pack precision perfor-
mance into the space-saving, industry standard 8-pin SO pack-
age. Its combination of precision with low power and extremely
low input bias current makes the dual OP297 useful in a wide
variety of applications.
Precision performance of the OP297 includes very low offset,
under 50 µV, and low drift, below 0.6 µV/°C. Open-loop gain
exceeds 2000 V/mV insuring high linearity in every application.
60
IB
40
IB+
20
VS = ±15V
VCM = 0V
0
2 0 IOS
–40
–60
–75 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
Figure 1. Low Bias Current Over Temperature
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
PIN CONNECTIONS
Plastic Epoxy-DIP (P Suffix)
8-Pin Cerdip (Z Suffix)
8-Pin Narrow Body SOIC (S Suffix)
OUT A 1
–IN A 2
+IN A 3
V– 4
A
8 V+
B 7 OUT B
6 –IN B
5 +IN B
Errors due to common-mode signals are eliminated by the
OP297’s common-mode rejection of over 120 dB. The
OP297’s power supply rejection of over 120 dB minimizes
offset voltage changes experienced in battery powered systems.
Supply current of the OP297 is under 625 µA per amplifier and
it can operate with supply voltages as low as ± 2 V.
The OP297 utilizes a super-beta input stage with bias current
cancellation to maintain picoamp bias currents at all tempera-
tures. This is in contrast to FET input op amps whose bias
currents start in the picoamp range at 25°C, but double for
every 10°C rise in temperature, to reach the nanoamp range
above 85°C. Input bias current of the OP 297 is under 100 pA
at 25°C and is under 450 pA over the military temperature
range.
Combining precision, low power and low bias current, the
OP297 is ideal for a number of applications including instru-
mentation amplifiers, log amplifiers, photodiode preamplifiers
and long-term integrators. For a single device, see the OP97;
for a quad, see the OP497.
400
1200 UNITS
300
TA = +25°C
VS = ±15V
VCM = 0V
200
100
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
Figure 2. Very Low Offset
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 World Wide Web Site: http://www.analog.com
Fax: 617/326-8703
© Analog Devices, Inc., 1997

1 page




OP297 pdf
8/21/97 4:00 PM
Typical Performance Characteristics–OP297
400
1200 UNITS
300
200
100
TA = +25°C
VS = ±15V
VCM = 0V
250
1200
UNITS
200
150
100
50
TA = +25°C
VS = ±15V
VCM = 0V
400
1200 UNITS
300
200
100
TA = +25°C
VS = ±15V
VCM = 0V
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET VOLTAGE (µV)
Figure 4. Typical Distribution of Input
Offset Voltage
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT BIAS CURRENT (pA)
Figure 5. Typical Distribution of Input
Bias Current
0
–100 –80 –60 –40 –20 0 20 40 60 80 100
INPUT OFFSET CURRENT (pA)
Figure 6. Typical Distribution of In-
put Offset Current
60
IB
40
IB+
20
VS = ±15V
VCM = 0V
0
2 0 IOS
–40
–60
–75 –50 –25 0 25 50 75 100 125
TEMPERATURE (°C)
Figure 7. Input Bias, Offset Current
vs. Temperature
60
TA = +25°C
40 VS = ±15V
20
IB
IB+
0
IOS
–20
–40
–60
–15 –10 –5
0
5 10 15
COMMON-MODE VOLTAGE (VOLTS)
Figure 8. Input Bias, Offset Current
vs. Common-Mode Voltage
±3
TA = +25°C
VS = ±15V
VCM = 0V
±2
±1
0
012345
TIME AFTER POWER APPLIED (MINUTES)
Figure 9. Input Offset Voltage Warm-
Up Drift
10000
BALANCED OR UNBALANCED
VS = ±15V
VCM = 0V
1000
100
–55°C TA 125°C
TA = +25°C
10
10 100 1k 10k 100k 1M
SOURCE RESISTANCE ()
10M
Figure 10. Effective Offset Voltage
vs. Source Resistance
100
BALANCED OR UNBALANCED
VS = ±15V
VCM = 0V
10
1
0.1
100
1k 10k 100k 1M 10M 100M
SOURCE RESISTANCE ()
35
30 TA = –55°C
25
20 TA = +25°C
15
10
TA = +125°C
5 VS = ±15V
0 OUTPUT SHORTED
–5 TO GROUND
–10
–15 TA = +125°C
–20 TA = +25°C
–25
–30 TA = –55°C
–35 0
1
2
34
TIME FROM OUTPUT SHORT (MINUTES)
Figure 11. Effective TCVOS vs. Source
Resistance
Figure 12. Short Circuit Current vs.
Time, Temperature
REV. D
–5–

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OP297 arduino
8/21/97 4:00 PM
R2
33k
C2
100pF
6
1/2 7
OP-297
IO 5 +
OP297
VOUT
R1
VIN
33k
IIN
C1
100pF
V+
28
1/2
3
OP-297
+4
1
Q1 1
2
3
7
6 Q2
5
R5
2k
MAT-04E
IREF
14
13 Q4
8
Q3 9
12
10
R3
50k
R4
50k
V–
Figure 35. Square-Root Amplifier
–15V
In these circuits, IREF is a function of the negative power supply.
To maintain accuracy, the negative supply should be well regu-
lated. For applications where very high accuracy is required, a
voltage reference may be used to set IREF. An important consid-
eration for the squaring circuit is that a sufficiently large input
voltage can force the output beyond the operating range of the
output op amp. Resistor R4 can be changed to scale IREF, or R1,
and R2 can be varied to keep the output voltage within the
usable range.
Unadjusted accuracy of the square-root circuit is better than
0.1% over an input voltage range of 100 mV to 10 V. For a
similar input voltage range, the accuracy of the squaring circuit
is better than 0.5%.
OP297 SPICE MACRO-MODEL
Figures 36 and 37 show the node end net list for a SPICE
macro model of the OP297. The model is a simplified version of
the actual device and simulates important dc parameters such as
VOS, IOS, IB, AVO, CMR, VO and ISY. AC parameters such as
slew rate, gain and phase response and CMR change with fre-
quency are also simulated by the model.
The model uses typical parameters for the OP297. The poles
and zeros in the model were determined from the actual open
and closed-loop gain and phase response of the OP297. In this
way, the model presents an accurate ac representation of the
actual device. The model assumes an ambient temperature
of 25°C.
REV. D
–11–

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