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SA1630 PDF даташит

Спецификация SA1630 изготовлена ​​​​«Philips» и имеет функцию, называемую «IF quadrature transceiver».

Детали детали

Номер произв SA1630
Описание IF quadrature transceiver
Производители Philips
логотип Philips логотип 

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SA1630 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
SA1630
IF quadrature transceiver
Product specification
IC17 Data Handbook
Philips
Semiconductors
1998 Jul 21









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SA1630 Даташит, Описание, Даташиты
Philips Semiconductors
IF quadrature transceiver
Product specification
SA1630
DESCRIPTION
The SA1630 is a 70–400 MHz I/Q transceiver for wireless LAN.
The Receive Path contains a digitally gain controlled linear IF
amplifier, a pair of quadrature down conversion mixers and a pair of
baseband amplifiers. The transmit path contains a pair of quadrature
up conversion mixers that transposes a quadrature baseband input
signal up to IF frequency. An external VCO signal is divided
internally and provides quadrature local oscillator signals for the
mixers. Another divider chain, reference divider and phase detector
are provided to avoid the need for an external synthesizer. To keep
power consumption to a minimum the transmit, receive and local
oscillator functions can be powered down under digital control.
FEATURES
Low supply voltage operation of 2.7V for main chip and 2.9V for
charge pump.
Low current consumption: 33.5 mA in RX, 26.5 mA in TX, typical
at 3V.
Flexible power up/down options.
Optional 2.5V regulated reference voltage available during
transmit.
Input IF frequency range of 70–400 MHz.
Internal IF PLL for synthesizing the local IF oscillator signal.
Bandwidth of baseband Tx inputs is 20 MHz and that of baseband
Rx outputs is 8.5MHz.
Designed for IEEE 802.11 wireless LAN using Direct Sequence
Spread Spectrum modulation.
Control registers power up in a default state.
Only a standard reference input frequency required, choice of 8,
11, 22 or 44 MHz.
Digital gain control of 70 dB in steps of 2 dB.
Rx Baseband amplifiers are capable of driving 1kW ||15pF
Rx Baseband o/p’s clamp symmetrically, above 1Vp–p in order to
prevent dc bias shift under overdrive conditions.
Package: LQFP–48, PCMCIA compatible
APPLICATIONS
IF circuitry for IEEE 802.11 DSSS wireless LAN.
Applications for high speed wireless data.
BE Package
48 47 46 45 44 43 42 41 40 39 38 37
VCCRx 1
GNDRX 2
VCCRx 3
PLL_ON 4
Rx_ON 5
GNDHDR 6
GC0 7
GC1 8
GC2 9
GC3 10
GC4 11
GC5 12
13 14 15 16 17 18 19 20 21 22 23 24
36 GNDCP
35 CP
34 VCC CP
33 DATA
32 CLOCK
31 STROBE
30 LOCK
29 LO_INX
28 LO_IN
27 GNDRx
26 CLK IN
25 CLKINX
Figure 1. Pin Configuration
SR01549
ORDERING INFORMATION
DESCRIPTION
48–Pin Plastic Low Profile Quad Flat package
TEMPERATURE RANGE
–40 to +85°C
ORDER CODE DWG #
SA1630BE
SOT313–2
1998 Jul 21
2 853–2049 19763









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SA1630 Даташит, Описание, Даташиты
Philips Semiconductors
IF quadrature transceiver
Product specification
SA1630
(5)
(23)
(43)
(42)
(7) GC0
(8) GC1
(9) GC2
(46) RxIFIN
(45) RxIFINX
(10) GC3
(11) GC4
(12) GC5
(28)
(29)
(34)
(35)
(37)
(30)
(36)
RXON
TxON
TxIFOUT
TxIFOUTX
(4)
PLL–ON
MODE
CONTROL
LO IN
LO INX
VCCCP
CP
IREF
LOCK
GNDCP
÷2
DAC
CHARGE
PUMP
÷ 8, 11, 22, 44
(38)
VREF 2.5
2.5V REGULATOR
(1,3)
(39)
VCCRX
VCCTXRX
GND_BB
VCC_BB
I_Tx IN
I_Tx INX
Q_Tx IN
Q_Tx INX
(13, 14)
(15)
(18)
(19)
(20)
(21)
I_RxOUT
1
(17)
BUFFERS
÷N
PHASE
DETECTOR
TEST REGISTER
Q_RxOUT
1
(16)
SYNTH
REGISTER
SERIAL
INPUT
GND HDR
GNDTXRX
(6)
(40, 41)
1998 Jul 21
CLKIN
(26)
CLKINX
(25)
VCCDIG
(22)
GND DIG
(24)
DATA CLOCK STROBE
(33) (32)
(31)
GND RX
(2, 27, 44, 47, 48)
Figure 2. Block Diagram
3
SR01551










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