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PDF SED1353 Data sheet ( Hoja de datos )
| Número de pieza | SED1353 | |
| Descripción | SED1353 GRAPHICS LCD CONTROLLER | |
| Fabricantes | Epson Company | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SED1353 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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GRAPHICS
SED1353
SED1353 GRAPHICS LCD CONTROLLER
October 1998
s DESCRIPTION
The SED1353 is a dot matrix graphic LCD controller supporting resolutions up to 1024x1024. It is
capable of displaying a maximum of 256 simultaneous colors out of a possible 4096 or 16 gray shades.
Design flexibility allows the SED1353 to interface to either an MC68000 family microprocessor or an
8/16-bit MPU/bus with minimum external logic. The Static RAM (SRAM) interface used for the display buffer
is optimized for speed and performance, supporting up to 128K bytes.
Two power save modes, combined with operating voltages of 2.7 volts through 5.5 volts, allow for a wide
range of applications while providing minimum power consumption.
s FEATURES
• pin compatible with the SED1352
• 16-bit 16 MHz MC68xxx MPU interface
• 8/16-bit MPU interface controlled by a READY
(or WAIT#) signal
• option to use built-in index register or direct-map-
ping to access one of sixteen internal registers
• 2-terminal crystal or external oscillator support
• 8/16-bit SRAM interface configurations
• split screen display support allowing two different
images to be simultaneously displayed
• virtual display support (displays images larger
than the panel size through the use of panning)
• display modes:
black-and-white display
2/4 bits per pixel, 4/16-level gray-scale display
2/4/8 bits per pixel, 4/16/256-level color display
• two software power-save modes
• low power consumption
• display memory interface:
128K bytes using one 64Kx16 SRAMs
128K bytes using two 64Kx8 SRAMs
64K bytes using two 32Kx8 SRAMs
40K bytes using one 8Kx8 and one 32Kx8
SRAM
32K bytes using one 32Kx8 SRAM
16K bytes using two 8Kx8 SRAMs
8K bytes using one 8Kx8 SRAM
• LCD panel configurations:
single-panel, single-drive passive display
dual-panel, dual-drive passive display
• maximum number of vertical lines:
1,024 lines (single-panel, single-drive display)
2,048 lines (dual-panel, dual-drive display)
• QFP5-100-S2 package (F0A)
• QFP15-100-STD package (F1A)
s SYSTEM BLOCK DIAGRAM
CLOCK
MPU
80xx
Z80
68xxx
DATA
CONTROL
ADDRESS
SED1353
LCD PANEL
SRAM
X18A-C-001-08
1
1 page  
s BLOCK DIAGRAM
IOR#, IOW#, IOCS#,
MEMCS#, MEMR#,
MEMW#, BHE#,
AB[19:0]
Bus
Signal
Translation
READY
DB[15:0]
Port
Decoder
Memory
Decoder
Data Bus
Conversion
Timing Generator
Power Save
Oscillator
Control Registers
GRAPHICS
SED1353
Sequence
Controller
Lookup
Table
Address
Generator
MPU/CRT
Selector
Display
Data
Formatter
SRAM Interface
LCD
Panel
Interface
LCDENB
UD[3:0]
LD[3:0]
LP, YD,
XSCL,
WF(XSCL2)
X18A-C-001-08
5
5 Page 
s SED1353F1A PIN OUT
76 LP
77 WF/XSCL2*
78 XSCL
79 LCDENB
80 VOE#
81 IOCS#
82 IOW#
83 IOR#
84 MEMCS#
85 MEMW#
86 MEMR#
87 READY
88 BHE#
89 OSC1
90 OSC2
91 DB0
92 DB1
93 DB2
94 DB3
95 DB4
96 DB5
97 DB6
98 DB7
99 VSS
100 VDD
SED1353F1A
GRAPHICS
SED1353
VDD
VSS
VD7
50
49
48
VD6 47
VD5 46
VD4 45
VD3 44
VD2 43
VD1 42
VD0 41
VA10 40
VA9 39
VA8 38
VA7 37
VA6 36
VA5 35
VA4 34
VA3 33
VA2 32
VA1 31
VA0 30
RESET 29
AB19
AB18
28
27
AB17 26
* Pin 77 = WF in all display modes except format 1 for 8-bit single color panel.
* Pin 77 = XSCL2 in format 1 for 8-bit single color panel.
X18A-C-001-08
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet SED1353.PDF ] | |
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