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74F374SC PDF даташит

Спецификация 74F374SC изготовлена ​​​​«Fairchild» и имеет функцию, называемую «Octal D-Type Flip-Flop with 3-STATE Outputs».

Детали детали

Номер произв 74F374SC
Описание Octal D-Type Flip-Flop with 3-STATE Outputs
Производители Fairchild
логотип Fairchild логотип 

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74F374SC Даташит, Описание, Даташиты
May 1988
Revised August 1999
74F374
Octal D-Type Flip-Flop with 3-STATE Outputs
General Description
The 74F374 is a high-speed, low-power octal D-type flip-
flop featuring separate D-type inputs for each flip-flop and
3-STATE outputs for bus-oriented applications. A buffered
Clock (CP) and Output Enable (OE) are common to all flip-
flops.
Features
s Edge-triggered D-type inputs
s Buffered positive edge-triggered clock
s 3-STATE outputs for bus-oriented applications
s Guaranteed 4000V minimum ESD protection
Ordering Code:
Order Number Package Number
Package Description
74F374SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F374SJ
M20D
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F374MSA
MSA20
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
74F374PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation DS009524
www.fairchildsemi.com









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74F374SC Даташит, Описание, Даташиты
Unit Loading/Fan Out
Pin Names
D0–D7
CP
OE
O0–O7
Description
Data Inputs
Clock Pulse Input (Active Rising Edge)
3-STATE Output Enable Input (Active LOW)
3-STATE Outputs
U.L.
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
1.0/1.0
20 µA/0.6 mA
1.0/1.0
20 µA/0.6 mA
1.0/1.0
20 µA/0.6 mA
150/40 (33.3) 3 mA/24 mA (20 mA)
Functional Description
The 74F374 consists of eight edge-triggered flip-flops with
individual D-type inputs and 3-STATE true outputs. The
buffered clock and buffered Output Enable are common to
all flip-flops. The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time
requirements on the LOW-to-HIGH Clock (CP) transition.
With the Output Enable (OE) LOW, the contents of the
eight flip-flops are available at the outputs. When the OE is
HIGH, the outputs go to the high impedance state. Opera-
tion of the OE input does not affected the state of the flip-
flops.
Truth Table
Inputs
Dn CP OE
HL
L L
XXH
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
= LOW-to-HIGH Clock Transition
Internal
Register
H
L
X
Output
On
H
L
Z
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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74F374SC Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Storage Temperature
65°C to +150°C
Ambient Temperature under Bias
55°C to +125°C
Junction Temperature under Bias
55°C to +150°C
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
0.5V to +7.0V
0.5V to +7.0V
Input Current (Note 2)
30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
3-STATE Output
0.5V to VCC
0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Units
VCC
Conditions
VIH
VIL
VCD
VOH
VOL
IIH
IBVI
ICEX
VID
IOD
IIL
IOZH
IOZL
IOS
IZZ
ICCZ
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
10% VCC
10% VCC
5% VCC
5% VCC
10% VCC
Input HIGH
Current
Input HIGH Current
Breakdown Test
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
Power Supply Current
2.0
2.5
2.4
2.7
2.7
4.75
60
V Recognized as a HIGH Signal
0.8 V
Recognized as a LOW Signal
1.2 V Min IIN = −18 mA
IOH = −1 mA
V Min IOH = −3 mA
IOH = −1 mA
IOH = −3 mA
0.5 V Min IOL = 24 mA
5.0 µA Max VIN = 2.7V
7.0 µA Max VIN = 7.0V
50 µA Max VOUT = VCC
V 0.0 IID = 1.9 µA
All Other Pins Grounded
3.75
µA
0.0 VIOD = 150 mV
All Other Pins Grounded
0.6 mA Max VIN = 0.5V
50 µA Max VOUT = 2.7V
50 µA Max VOUT = 0.5V
150 mA Max VOUT = 0V
500 µA 0.0V VOUT = 5.25V
55 86 mA Max VO = HIGH Z
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