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74F573 PDF даташит

Спецификация 74F573 изготовлена ​​​​«National» и имеет функцию, называемую «Octal D-Type Latch with TRI-STATE Outputs».

Детали детали

Номер произв 74F573
Описание Octal D-Type Latch with TRI-STATE Outputs
Производители National
логотип National логотип 

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74F573 Даташит, Описание, Даташиты
www.DataSheet4U.com
August 1995
54F 74F573
Octal D-Type Latch with TRI-STATE Outputs
General Description
The ’F573 is a high speed octal latch with buffered common
Latch Enable (LE) and buffered common Output Enable
(OE) inputs
This device is functionally identical to the ’F373 but has
different pinouts
Features
Y Inputs and outputs on opposite sides of package
allowing easy interface with microprocessors
Y Useful as input or output port for microprocessors
Y Functionally identical to ’F373
Y TRI-STATE outputs for bus interfacing
Y Guaranteed 4000V minimum ESD protection
Commercial
74F573PC
74F573SC (Note 1)
74F573SJ (Note 1)
Military
54F573DM (Note 2)
54F573FM (Note 2)
54F573LM (Note 2)
Package
Number
N20A
J20A
M20B
M20D
W20A
E20A
Package Description
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpak
20-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX and SJX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9566–1
IEEE IEC
TL F 9566 – 2
TL F 9566 – 3
TL F 9566–4
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9566
RRD-B30M115 Printed in U S A









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74F573 Даташит, Описание, Даташиты
Unit Loading Fan Out
Pin Names
Description
D0 – D7
LE
OE
O0 – O7
Data Inputs
Latch Enable Input (Active HIGH)
TRI-STATE Output Enable Input
(Active LOW)
TRI-STATE Latch Outputs
54F 74F
UL
HIGH LOW
10 10
10 10
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
10 10
20 mA b0 6 mA
150 40(33 3) b3 mA 24 mA (20 mA)
Functional Description
The ’F573 contains eight D-type latches with 3-state output
buffers When the Latch Enable (LE) input is HIGH data on
the Dn inputs enters the latches In this condition the latch-
es are transparent i e a latch output will change state each
time its D input changes When LE is LOW the latches store
the information that was present on the D inputs a setup
time preceding the HIGH-to-LOW transition of LE The 3-
state buffers are controlled by the Output Enable (OE) input
When OE is LOW the buffers are in the bi-state mode
When OE is HIGH the buffers are in the high impedance
mode but this does not interfer with entering new data into
the latches
Function Table
Inputs
OE LE D
L HH
L HL
L LX
H XX
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
O0 e Value stored from previous clock cycle
Logic Diagram
Outputs
O
H
L
O0
Z
TL F 9566 – 5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2









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74F573 Даташит, Описание, Даташиты
Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Storage Temperature
b65 C to a150 C
Ambient Temperature under Bias
b55 C to a125 C
Junction Temperature under Bias
Plastic
b55 C to a175 C
b55 C to a150 C
VCC Pin Potential to
Ground Pin
b0 5V to a7 0V
Input Voltage (Note 2)
b0 5V to a7 0V
Input Current (Note 2)
b30 mA to a5 0 mA
Voltage Applied to Output
in HIGH State (with VCC e 0V)
Standard Output
TRI-STATE Output
b0 5V to VCC
b0 5V to a5 5V
Current Applied to Output
in LOW State (Max)
ESD Last Passing Voltage (Min)
twice the rated IOL (mA)
4000V
Note 1 Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired Functional operation under
these conditions is not implied
Note 2 Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Commercial
b55 C to a125 C
0 C to a70 C
Supply Voltage
Military
Commercial
a4 5V to a5 5V
a4 5V to a5 5V
DC Electrical Characteristics
Symbol
VIH
VIL
VCD
VOH
VOL
IIH
IBVI
ICEX
VID
IOD
IIL
IOZH
IOZL
IOS
IZZ
ICCL
ICCZ
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
74F 5% VCC
74F 5% VCC
54F 10% VCC
74F 10% VCC
54F
74F
Input HIGH Current 54F
Breakdown Test
74F
Output HIGH
Leakage Current
54F
74F
Input Leakage
Test
74F
Output Leakage
Circuit Current
74F
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
Power Supply Current
Power Supply Current
54F 74F
Min Typ Max
20
08
b1 2
25
24
25
24
27
27
05
05
20 0
50
100
70
250
50
4 75
3 75
b0 6
50
b50
b60
b150
500
35 55
35 55
Units
V
V
V
V
V
mA
mA
mA
V
mA
mA
mA
mA
mA
mA
mA
mA
VCC
Min
Min
Min
Max
Max
Max
00
00
Max
Max
Max
Max
0 0V
Max
Max
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
IIN e b18 mA
IOH e b1 mA
IOH e b3 mA
IOH e b1 mA
IOH e b3 mA
IOH e b1 mA
IOH e b3 mA
IOL e 20 mA
IOL e 24 mA
VIN e 2 7V
VIN e 7 0V
VOUT e VCC
IID e 1 9 mA
All Other Pins Grounded
VIOD e 150 mV
All Other Pins Grounded
VIN e 0 5V
VOUT e 2 7V
VOUT e 0 5V
VOUT e 0V
VOUT e 5 25V
VO e LOW
VO e HIGH Z
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