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74F645PC PDF даташит

Спецификация 74F645PC изготовлена ​​​​«Fairchild» и имеет функцию, называемую «Octal Bus Transceiver with 3-STATE Outputs».

Детали детали

Номер произв 74F645PC
Описание Octal Bus Transceiver with 3-STATE Outputs
Производители Fairchild
логотип Fairchild логотип 

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74F645PC Даташит, Описание, Даташиты
July 1989
Revised August 1999
74F640 • 74F645
Octal Bus Transceiver with 3-STATE Outputs
General Description
These devices are octal bus transceivers designed for
asynchronous two-way data flow between the A and B bus-
ses. Both busses are capable of sinking 64 mA, have 3-
STATE outputs, and a common output enable pin. The
direction of data flow is determined by the transmit/receive
(T/R) input. The 74F645 is a high speed/low power version
of the 74F245. The 74F640 is an inverting option of the
74F645.
Features
s Designed for asynchronous two-way data flow between
busses
s Outputs sink 64 mA
s Transmit/receive (T/R) input controls the direction of
data flow
s 74F645 is a lower power, faster version of the 74F245
s 74F640 is an inverting option of the 74F645
Ordering Code:
Order Number Package Number
Package Description
74F640SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F640PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74F645PC
N20A
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
© 1999 Fairchild Semiconductor Corporation DS010267
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74F645PC Даташит, Описание, Даташиты
Unit Loading/Fan Out
Pin Names
OE
T/R
A0–A7
B0–B7
Description
Output Enable Input (Active LOW)
Transmit/Receive Input
Side A Inputs or
3-STATE Outputs
Side B Inputs or
3-STATE Outputs
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
3.5/0.667
600/106.6
3.5/0.667
600/106.6
Input IIH/IIL
Output IOH/IOL
20 µA/0.6 mA
20 µA/0.6 mA
70 µA/0.4 mA
12 mA/64 mA
70 µA/0.4 mA
12 mA/64 mA
Functional Description
The output enable (OE) is active LOW. If the device is dis-
abled (OE HIGH), the outputs are in the high impedance
state. The transmit/receive input (T/R) controls whether
data is transmitted from the A bus to the B bus or from the
B bus to the A bus. When T/R is LOW, B data is sent to the
A bus. If T/R is HIGH, A data is sent to the B bus.
Logic Diagram
Function Table
Inputs
Outputs
OE T/R
74F640
74F645
L L Bus B data to Bus A Bus B data to Bus A
L H Bus A data to Bus B Bus A data to Bus B
HX
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High Impedance State
Z
Z
74F640
74F645
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74F645PC Даташит, Описание, Даташиты
Absolute Maximum Ratings(Note 1)
Storage Temperature
65°C to +150°C
Ambient Temperature under Bias
55°C to +125°C
Junction Temperature under Bias
55°C to +150°C
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
0.5V to +7.0V
0.5V to +7.0V
Input Current (Note 2)
30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
3-STATE Output
0.5V to VCC
0.5V to +5.5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Units
VCC
Conditions
VIH
VIL
VCD
VOH
VOL
IIH
IBVI
IBVIT
ICEX
VID
IOD
IIL
IIH + IOZH
IIL + IOZL
IOS
IZZ
ICCH
ICCL
ICCZ
ICCH
ICCL
ICCZ
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
10% VCC
Output LOW
Voltage
10% VCC
Input HIGH
Current
Input HIGH Current
Breakdown Test
Input HIGH Current
Breakdown (I/O)
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Bus Drainage Test
Power Supply Current (74F640)
Power Supply Current (74F640)
Power Supply Current (74F640)
Power Supply Current (74F645)
Power Supply Current (74F645)
Power Supply Current (74F645)
2.0
2.0
4.75
100
V Recognized as a HIGH Signal
0.8 V
Recognized as a LOW Signal
1.2 V Min IIN = −18 mA (Non I/O Pins)
V Min IOH = −15 mA (An, Bn)
0.55
V
Min IOL = 64 mA (An, Bn)
5.0 µA Max VIN = 2.7V (Non I/O Pins)
7.0 µA Max VIN = 7.0V (Non I/O Pins)
0.5 mA Max VIN = 5.5V (An, Bn)
50 µA Max VOUT = VCC
V 0.0 IID = 1.9 µA
All Other Pins Grounded
3.75
µA
0.0 VIOD = 150 mV
All Other Pins Grounded
0.6 mA Max VIN = 0.5V (Non I/O Pins)
70 µA Max VOUT = 2.7V (An, Bn)
650 µA Max VOUT = 0.5V (An, Bn)
225 mA Max VOUT = 0V
500 µA 0.0V VOUT = 5.25
80 mA Max VO = HIGH, VIN = 0.2V
80 mA Max VO = LOW
96 mA Max VO = HIGH Z
65 mA Max VO = HIGH
80 mA Max VO = LOW, VIN = 0.2V
90 mA Max VO = HIGH Z
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