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74F646MSA PDF даташит

Спецификация 74F646MSA изготовлена ​​​​«National» и имеет функцию, называемую «Octal Transceiver/Register with TRI-STATE Outputs».

Детали детали

Номер произв 74F646MSA
Описание Octal Transceiver/Register with TRI-STATE Outputs
Производители National
логотип National логотип 

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74F646MSA Даташит, Описание, Даташиты
December 1994
54F 74F646  74F646B  54F 74F648
Octal Transceiver Register with TRI-STATE Outputs
General Description
These devices consist of bus transceiver circuits with TRI-
STATE D-type flip-flops and control circuitry arranged for
multiplexed transmission of data directly from the input bus
or from the internal registers Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes
to a high logic level Control G and direction pins are provid-
ed to control the transceiver function In the transceiver
mode data present at the high impedance port may be
stored in either the A or the B register or in both The select
controls can multiplex stored and real-time (transparent
mode) data The direction control determines which bus will
receive data when the enable control G is Active LOW In
the isolation mode (control G HIGH) A data may be stored
in the B register and or B data may be stored in the A regis-
ter
Features
Y Independent registers for A and B buses
Y Multiplexed real-time and stored data
Y ’F648 has inverting data paths
Y ’F646 ’F646B have non-inverting data paths
Y ’F646B is a faster version of the ’F646
Y TRI-STATE outputs
Y 300 mil slim DIP
Y Guaranteed 4000V minimum ESD protection
Commercial
74F646SPC
74F646SC (Note 1)
74F646MSA (Note 1)
74F646BSPC
74F646BSC (Note 1)
74F648SPC
74F648SC (Note 1)
Military
54F646DM (Note 2)
54F646FM (Note 2)
54F646LM (Note 2)
54F648SDM (Note 2)
54F648FM (Note 2)
54F648LM (Note 2)
Package
Number
N24C
J24F
M24B
MSA24
W24C
E28A
N24C
M24B
N24C
J24F
M24B
W24C
E28A
Package Description
24-Lead (0 300 Wide) Molded Dual-In-Line
24-Lead (0 300 Wide) Ceramic Dual-In-Line
24-Lead (0 300 Wide) Molded Small Outline JEDEC
24-Lead Molded Shrink Small Outline EIAJ Type II
24-Lead Cerpack
28-Lead Ceramic Leadless Chip Carrier Type C
24-Lead (0 300 Wide) Molded Dual-In-Line
24-Lead (0 300 Wide) Molded Small Outline JEDEC
24-Lead (0 300 Wide) Molded Dual-In-Line
24-Lead (0 300 Wide) Ceramic Dual-In-Line
24-Lead (0 300 Wide) Molded Small Outline JEDEC
24-Lead Cerpack
24-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX
Note 2 Military grade device with environmental and burn-in processing Use suffix e DMQB FMQB and LMQB
Logic Symbols
’F646 ’F646B
’F648
TL F 9580 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9580
TL F 9580 – 7
RRD-B30M75 Printed in U S A









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74F646MSA Даташит, Описание, Даташиты
Logic Symbols (Continued)
IEEE IEC
’F646 ’F646B
IEEE IEC
’F648
Connection Diagrams
Pin Assignment
for DIP SOIC and Flatpak
’F646 ’F646B
TL F 9580–4
TL F 9580 – 9
Pin Assignment
for DIP SOIC and Flatpak
’F648
Pin Assignment
for LCC
’F646 ’F646B
TL F 9580–2
Pin Assignment
for LCC
’F648
TL F 9580 – 8
TL F 9580–3
2
TL F 9580 – 10









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74F646MSA Даташит, Описание, Даташиты
Unit Loading Fan Out
Pin Names
Description
A0 – A7
Data Register A Inputs
TRI-STATE Outputs
B0 – B7
Data Register B Inputs
TRI-STATE Outputs
CPAB CPBA Clock Pulse Inputs
SAB SBA Select Inputs
G Output Enable Input
DIR Direction Control Input
54F 74F
UL
HIGH LOW
Input IIH IIL
Output IOH IOL
3 5 1 083
70 mA b650 mA
600 106 6 (80) b12 mA 64 mA (48 mA)
3 5 1 083
70 mA b650 mA
600 106 6 (80) b12 mA 64 mA (48 mA)
10 10
20 mA b0 6 mA
10 10
20 mA b0 6 mA
10 10
20 mA b0 6 mA
10 10
20 mA b0 6 mA
Function Table
Inputs
Data I O
G DIR CPAB CPBA SAB SBA A0 – A7 B0 – B7
Function
HX
HX
HX
H or L
L
X
H or L
X
L
X
X
X
X Isolation
X
Input
Input
Clock An Data into A Register
X Clock Bn Data into B Register
LH
X
LH
L
L H H or L
LH
L
X
X
X
X
LX
An to Bn Real Time (Transparent Mode)
L
X
Input
Output
Clock An Data into A Register
HX
A Register to Bn (Stored Mode)
HX
Clock An Data into A Register and Output to Bn
LL
LL
LL
LL
X XX
X LX
X
H or L
X
X LX
L Bn to An Real Time (Transparent Mode)
L
Output
Input
Clock Bn Data into B Register
H B Register to An (Stored Mode)
H Clock Bn Data into B Register and Output to An
The data output functions may be enabled or disabled by various signals at the G and DIR Inputs Data input functions are always enabled i e data at the bus
pins will be stored on every LOW-to-HIGH transition of the clock inputs
H e HIGH Voltage Level
L e LOW Voltage Level
X e Irrelevant
L e LOW-to-HIGH Transition
3










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Номер в каталогеОписаниеПроизводители
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74F646MSAOctal Transceiver/Register with TRI-STATE OutputsNational
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