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74F821SC PDF даташит

Спецификация 74F821SC изготовлена ​​​​«National» и имеет функцию, называемую «10-Bit D-Type Flip-Flop».

Детали детали

Номер произв 74F821SC
Описание 10-Bit D-Type Flip-Flop
Производители National
логотип National логотип 

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74F821SC Даташит, Описание, Даташиты
December 1994
54F 74F821
10-Bit D-Type Flip-Flop
General Description
The ’F821 is a 10-bit D-type flip-flop with TRI-STATE true
outputs arranged in a broadside pinout The ’F821 is func-
tionally and pin compatible with the AMD’s Am29821
Features
Y TRI-STATE Outputs
Y Direct replacement for AMD’s Am29821
Commercial
74F821SPC
74F821SC (Note 1)
Military
54F821SDM (Note 2)
54F821FM (Note 2)
54F821LM (Note 2)
Package
Number
N24C
J24F
M24B
W24C
E28A
Package Description
24-Lead (0 300 Wide) Molded Dual-In-Line
24-Lead (0 300 Wide) Ceramic Dual-In-Line
24-Lead (0 300 Wide) Molded Small Outline JEDEC
24-Lead Cerpack
24-Lead Ceramic Leadless Chip Carrier Type C
Note 1 Devices also available in 13 reel Use suffix e SCX
Note 2 Military grade device with environmental and burn-in processing Use suffix e SDMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment
for DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9595–1
IEEE IEC
TL F 9595 – 2
TL F 9595 – 3
TL F 9595–5
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 9595
RRD-B30M75 Printed in U S A









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74F821SC Даташит, Описание, Даташиты
Unit Loading Fan Out
Pin Names
D0 – D9
OE
CP
O0 – O9
Description
Data Inputs
Output Enable
TRI-STATE Input
Clock Input
TRI-STATE Outputs
UL
HIGH LOW
10 10
10 10
10 10
150 40 (33 3)
54F 74F
Input IIH IIL
Output IOH IOL
20 mA b0 6 mA
20 mA b0 6 mA
20 mA b0 6 mA
b3 0 mA 24 mA (20 mA)
Functional Description
The ’F821 consists of ten D-type edge-triggered flip-flops
This device has TRI-STATE true outputs for bus systems
organized in a broadside pinning The buffered Clock (CP)
and buffered Output Enable (OE) are common to all flip-
flops The flip-flops will store the state of their individual D
inputs that meet the setup and hold times requirements on
the LOW-to-HIGH CP transition With the OE LOW the con-
tent of the flip-flops are available at the outputs When the
OE is HIGH the outputs go to the high impedance state
Operation of the OE input does not affect the state of the
flip-flops
Logic Diagram
Function Table
Inputs
Internal Output
OE CP D
Q
O
Function
H HX
H LX
NC
NC
Z Hold
Z Hold
H LL
H
Z Load
H LH
L
Z Load
L LL
H
L Data Available
L LH
L
H Data Available
L H X NC
NC No Change in Data
L L X NC
NC No Change in Data
L e LOW Voltage Level
H e HIGH Voltage Level
X e Immaterial
Z e High Impedance
L e LOW-to-HIGH Transition
NC e No Change
TL F 9595 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2









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74F821SC Даташит, Описание, Даташиты
Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Storage Temperature
b65 C to a150 C
Ambient Temperature under Bias
b55 C to a125 C
Junction Temperature under Bias
Plastic
b55 C to a175 C
b55 C to a150 C
VCC Pin Potential to
Ground Pin
b0 5V to a7 0V
Input Voltage (Note 2)
b0 5V to a7 0V
Input Current (Note 2)
b30 mA to a5 0 mA
Voltage Applied to Output
in HIGH State (with VCC e 0V)
Standard Output
TRI-STATE Output
b0 5V to VCC
b0 5V to a5 5V
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
Note 1 Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired Functional operation under
these conditions is not implied
Note 2 Either voltage limit or current limit is sufficient to protect inputs
Recommended Operating
Conditions
Free Air Ambient Temperature
Military
Commercial
b55 C to a125 C
0 C to a70 C
Supply Voltage
Military
Commercial
a4 5V to a5 5V
a4 5V to a5 5V
DC Electrical Characteristics
Symbol
Parameter
54F 74F
Min Typ Max
Units VCC
Conditions
VIH
VIL
VCD
VOH
VOL
IIH
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH Current
54F 10% VCC
54F 10% VCC
74F 10% VCC
74F 10% VCC
74F 5% VCC
74F 5% VCC
54F 10% VCC
74F 10% VCC
54F
74F
20
25
24
25
24
27
27
V Recognized as a HIGH Signal
08 V
Recognized as a LOW Signal
b1 2 V Min IIN e b18 mA
IOH e b1 mA
IOH e b3 mA
V Min IOH e b1 mA
IOH e b3 mA
IOH e b1 mA
IOH e b3 mA
0 5 V Min IOL e 20 mA
0 5 IOL e 24 mA
20 0
50
mA Max VIN e 2 7V
IBVI Input HIGH Current 54F
Breakdown Test
74F
100 mA Max VIN e 7 0V
70
ICEX
Output HIGH
Leakage Current
54F
74F
250 mA Max VOUT e VCC
50
VID
Input Leakage Test
74F
4 75
V 0 0 IID e 1 9 mA
All Other Pins Grounded
IOD
Output Leakage
74F
Circuit Current
3 75 mA 0 0 VIOD e 150 mV
All Other Pins Grounded
IIL
IOZH
IOZL
IOS
ICCZ
Input LOW Current
Output Leakage Current
Output Leakage Current
Output Short-Circuit Current
Power Supply Current
b0 6 mA Max VIN e 0 5V
50 mA Max VOUT e 2 7V
b50
mA Max VOUT e 0 5V
b60
b150 mA Max VOUT e 0V
78 100 mA Max VO e HIGH Z
3










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