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PDF 74F822 Data sheet ( Hoja de datos )
| Número de pieza | 74F822 | |
| Descripción | Bus interface registers | |
| Fabricantes | Philips | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de 74F822 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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INTEGRATED CIRCUITS
74F821/822/823/824/825/826
Bus interface registers
Product specification
IC15 Data Handbook
1996 Jan 05
Philips
Semiconductors
1 page  
Philips Semiconductors
Bus interface registers
IEC/IEEE SYMBOL – 74F823
1 EN1
11 R
14 G1
13 1G2
2 2D
3
4
5
6
7
8
9
10
1
23
22
21
20
19
18
17
16
15
SF00490
PIN CONFIGURATION – 74F824
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
D8 10
MR 11
GND 12
24 VCC
23 Q0
22 Q1
21 Q2
20 Q3
19 Q4
18 Q5
17 Q6
16 Q7
15 Q8
14 CE
13 CP
SF00491
LOGIC SYMBOL – 74F824
2 3 4 5 6 7 8 9 10
D0 D1 D2 D3 D4 D5 D6 D7 D8
13 CP
14 CE
11 MR
1 OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8
VCC = Pin 24
GND = Pin 12
23 22 21 20 19 18 17 16 15
SF00492
Product specification
74F821/822/823/824/825/826
IEC/IEEE SYMBOL – 74F824
1 EN1
11 R
14 G1
13 1G2
2 2D
3
4
5
6
7
8
9
10
1
23
22
21
20
19
18
17
16
15
SF00493
PIN CONFIGURATION – 74F825
OE0 1
OEI 2
DO 3
D1 4
D2 5
D3 6
D4 7
D5 8
D6 9
D7 10
MR 11
GND 12
24 VCC
23 OE2
22 QO
21 Q1
20 Q2
19 Q3
18 Q4
17 Q5
16 Q6
15 Q7
14 CE
13 CP
SF00494
LOGIC SYMBOL – 74F825
3 4 5 6 7 8 9 10
D0 D1 D2 D3 D4 D5 D6 D7
13 CP
14 CE
11 MR
1 OE0
2 OE1
23 OE2
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
VCC = Pin 24
GND = Pin 12
22 21 20 19 18 17 16 15
SF00495
1996 Jan 05
5
5 Page 
Philips Semiconductors
Bus interface registers
Product specification
74F821/822/823/824/825/826
AC ELECTRICAL CHARACTERISTICS FOR 74F821/74F822/74F824/74F825/74F826
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN MAX
fmax Maximum clock frequency
Waveform 1 150 180
140
tPLH Propagation delay
tPHL CP to Qn or Qn
74F821,
74F825, 74F826
Waveform 1
4.0 6.5 8.5
4.0 6.0 8.5
4.0
3.5
tPLH Propagation delay
tPHL CP to Qn
74F822, 74F824 Waveform 1
4.5 6.5 9.0
4.5 6.5 9.0
4.5
4.5
tPHL
Propagation delay
MR to Qn or Qn
74F824
74F825, 74F826
Waveform 2
3.0 5.0 8.0
3.0
9.5
9.0
10.0
9.0
8.0
tPZH
tPZL
tPHZ
tPLZ
Output enable time
OEn to Qn or Qn
Output disable time
OEn to Qn or Qn
Waveform 4
Waveform 5
Waveform 4
Waveform 5
2.0 4.5 8.0
3.0 5.0 8.0
1.5 3.5 6.5
1.5 3.5 6.5
2.0
2.5
1.5
1.5
9.0
9.0
7.5
7.5
UNIT
ns
ns
ns
ns
ns
ns
AC SETUP REQUIREMENTS FOR 74F821/74F822/74F824/74F825/74F826
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
Tamb = +25°C
VCC = +5.0V
CL = 50pF, RL = 500Ω
MIN TYP MAX
Tamb = 0°C to +70°C
VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω
MIN MAX
tsu (H)
tsu (L)
th (H)
th (L)
tw (H)
tw (L)
tsu (H)
tsu (L)
th (H)
th (L)
tw (L)
trec
Setup time, high or low
Dn to CP
Hold time, high or low
Dn to CP
CP Pulse width,
high or low
Setup time, high or low,
CE to CP
Hold time, high or low
CE to CP
MR Pulse width, low
Recovery time, MR to CP
Waveform 3
Waveform 3
Waveform 1
74F824, 74F825,
74F826
Waveform 3
Waveform 3
Waveform 2
Waveform 2
1.0
1.0
2.0
2.0
3.5
3.5
0.0
2.0
0.0
3.0
4.5
2.5
1.0
1.0
2.0
2.0
4.0
4.0
0.0
2.0
0.0
3.5
4.5
2.5
UNIT
ns
ns
ns
ns
ns
ns
ns
1996 Jan 05
11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet 74F822.PDF ] | |
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