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Спецификация 74F827 изготовлена «Fairchild» и имеет функцию, называемую «10-Bit Buffers/Line Drivers». |
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Детали детали
Номер произв | 74F827 |
Описание | 10-Bit Buffers/Line Drivers |
Производители | Fairchild |
логотип |
7 Pages
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April 1988
Revised August 1999
74F827 • 74F828
10-Bit Buffers/Line Drivers
General Description
The 74F827 and 74F828 10-bit bus buffers provide high
performance bus interface buffering for wide data/address
paths or buses carrying parity. The 10-bit buffers have
NOR output enables for maximum control flexibility.
The 74F828 is an inverting version of the 74F827.
Features
s 3-STATE output
s 74F828 is inverting
Ordering Code:
Order Number Package Number
Package Description
74F827SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F827SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
74F828SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F828SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
74F827
74F828
© 1999 Fairchild Semiconductor Corporation DS009598
www.fairchildsemi.com
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Logic Symbols
74F827
IEEE/IEC
74F827
74F828
IEEE/IEC
74F828
Unit Loading/Fan Out
Pin Names
OE1, OE2
D0–D7
O0–O7
Description
Output Enable Input
Data Inputs
Data Outputs, 3-STATE
U.L.
HIGH/LOW
1.0/1.0
1.0/1.0
600/106.6 (80)
Input IIH/IIL
Output IOH/IOL
20 µA/−0.6 mA
20 µA/−0.6 mA
−12 mA/64 mA (48 mA)
Functional Description
The 74F827 and 74F828 are line drivers designed to be
employed as memory address drivers, clock drivers and
bus-oriented transmitters/receivers which provide
improved PC board density. The devices have 3-STATE
outputs controlled by the Output Enable (OE) pins. The
outputs can sink 64 mA and source 15 mA. Input clamp
diodes limit high-speed termination effects.
Function Table
Inputs
Outputs
OE Dn
On
74F827 74F828
LH
H
L
LL
L
H
HX
Z
Z
H = HIGH Voltage level
L = LOW Voltage Level
Z = High Impedance
X = Immaterial
Function
Transparent
Transparent
High Z
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Logic Diagrams
74F827
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74F828
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
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