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PDF 74F828SPC Data sheet ( Hoja de datos )
| Número de pieza | 74F828SPC | |
| Descripción | 10-Bit Buffers/Line Drivers | |
| Fabricantes | Fairchild | |
| Logotipo |  |
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April 1988
Revised August 1999
74F827 • 74F828
10-Bit Buffers/Line Drivers
General Description
The 74F827 and 74F828 10-bit bus buffers provide high
performance bus interface buffering for wide data/address
paths or buses carrying parity. The 10-bit buffers have
NOR output enables for maximum control flexibility.
The 74F828 is an inverting version of the 74F827.
Features
s 3-STATE output
s 74F828 is inverting
Ordering Code:
Order Number Package Number
Package Description
74F827SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F827SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
74F828SC
M24B
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
74F828SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
74F827
74F828
© 1999 Fairchild Semiconductor Corporation DS009598
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Symbol
Parameter
tPLH Propagation Delay
tPHL Data to Output (74F827)
tPLH Propagation Delay
tPHL Data to Output (74F828)
tPZH Output Enable Time
tPZL OE to On
tPHZ Output Disable Time
tPLZ OE to On
TA = +25°C
VCC = +5.0V
CL = 50 pF
Min Typ Max
1.0 3.0 5.5
1.5 3.3 5.5
1.0 3.0 5.0
1.0 2.0 4.0
3.0 5.7 9.0
3.5 6.8 11.5
1.5 3.3 8.0
1.0 3.5 8.0
TA = −55°C to +125°C
VCC = +5.0V
CL = 50 pF
Min Max
1.0 7.5
1.5 7.0
2.5 10.0
3.0 12.5
1.5 9.0
1.0 9.0
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
Min Max
1.0 6.5
1.5 6.0
1.0 5.5
1.0 4.0
2.5 9.5
3.0 12.0
1.5 8.5
1.0 8.5
Units
ns
ns
ns
ns
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74F828SPC.PDF ] | |
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