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74HC123 PDF даташит

Спецификация 74HC123 изготовлена ​​​​«Philips» и имеет функцию, называемую «Dual retriggerable monostable multivibrator with reset».

Детали детали

Номер произв 74HC123
Описание Dual retriggerable monostable multivibrator with reset
Производители Philips
логотип Philips логотип 

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74HC123 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT123
Dual retriggerable monostable
multivibrator with reset
Product specification
Supersedes data of September 1993
File under Integrated Circuits, IC06
1998 Jul 08









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74HC123 Даташит, Описание, Даташиты
Philips Semiconductors
Dual retriggerable monostable
multivibrator with reset
Product specification
74HC/HCT123
FEATURES
DC triggered from active HIGH or
active LOW inputs
Retriggerable for very long pulses
up to 100% duty factor
Direct reset terminates output
pulse
Schmitt-trigger action on all inputs
except for the reset input
Output capability: standard (except
for nREXT/CEXT)
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT123 are high-speed
Si-gate CMOS devices and are pin
compatible with low power Schottky
TTL (LSTTL). They are specified in
compliance with JEDEC standard no.
7A.
The 74HC/HCT123 are dual
retriggerable monostable
multivibrators with output pulse width
control by three methods. The basic
pulse time is programmed by
selection of an external resistor
(REXT) and capacitor (CEXT). The
external resistor and capacitor are
normally connected as shown in
Fig.6.
Once triggered, the basic output
pulse width may be extended by
retriggering the gated active
LOW-going edge input (nA) or the
active HIGH-going edge input (nB).
By repeating this process, the output
pulse period (nQ = HIGH, nQ = LOW)
can be made as long as desired.
Alternatively an output delay can be
terminated at any time by a
LOW-going edge on input nRD, which
also inhibits the triggering.
An internal connection from nRD to
the input gates makes it possible to
trigger the circuit by a positive-going
signal at input nRD as shown in the
function table. Figures 7 and 8
illustrate pulse control by retriggering
and early reset. The basic output
pulse width is essentially determined
by the values of the external timing
components REXT and CEXT. For
pulse widths, when CEXT < 10 000 pF,
see Fig.9.
When CEXT > 10 000 pF, the typical
output pulse width is defined as:
tW = 0.45 × REXT × CEXT (typ.),
where:
tW = pulse width in ns;
REXT = external resistor in k;
CEXT = external capacitor in pF.
Schmitt-trigger action in the nA and
nB inputs, makes the circuit highly
tolerant to slower input rise and fall
times.
The ‘123’ is identical to the ‘423’ but
can be triggered via the reset input.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL PARAMETER
CONDITIONS
TYPICAL
UNIT
HC HCT
tPHL/ tPLH propagation delay
CL = 15 pF;
nA, nB to nQ, nQ VCC = 5 V;
26 26 ns
nRD to nQ, nQ
REXT = 5 k;
CEXT = 0 pF
20
23
ns
CI input capacitance
3.5 3.5 pF
CPD power dissipation
capacitance per
notes 1 and 2 54 56 pF
monostable
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) + 0.75 × CEXT
× VCC2 × fo + D × 16 × VCC where:
fi = input frequency in MHz
fo = output frequency in MHz
D = duty factor in %
CL = output load capacitance in pF
VCC = supply voltage in V
CEXT = timing capacitance in pF
(CL × VCC2 × fo) sum of outputs
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
1998 Jul 08
2









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74HC123 Даташит, Описание, Даташиты
Philips Semiconductors
Dual retriggerable monostable
multivibrator with reset
Product specification
74HC/HCT123
ORDERING INFORMATION
TYPE
NUMBER
74HC123N;
74HCT123N
74HC123D;
74HCT123D
74HC123DB;
74HCT123DB
74HC123PW;
74HCT123PW
NAME
DIP16
PACKAGE
DESCRIPTION
plastic dual in-line package; 16 leads (300 mil); long body
SO16 plastic small outline package; 16 leads; body width 3.9 mm
SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm
TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm
VERSION
SOT38-1
SOT109-1
SOT338-1
SOT403-1
PIN DESCRIPTION
PIN NO.
1, 9
2, 10
3, 11
4, 12
7
8
13, 5
14, 6
15
16
SYMBOL
1A, 2A
1B, 2B
1RD, 2RD
1Q, 2Q
2REXT/CEXT
GND
1Q, 2Q
1CEXT, 2CEXT
1REXT/CEXT
VCC
NAME AND FUNCTION
trigger inputs (negative-edge triggered)
trigger inputs (positive-edge triggered)
direct reset LOW and trigger action at positive edge
outputs (active LOW)
external resistor/capacitor connection
ground (0 V)
outputs (active HIGH)
external capacitor connection
external resistor/capacitor connection
positive supply voltage
Fig.1 Pin configuration.
1998 Jul 08
Fig.2 Logic symbol.
3
Fig.3 IEC logic symbol.










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